Commit Graph

  • 5c60160f3e arch-arm: Fix position of AA64ISAR0.AES bitfield Giacomo Travaglini 2023-05-15 11:42:56 +01:00
  • 48ae255762 sim,python: add activate option and method Yan Lee 2023-05-15 00:32:32 -07:00
  • b923cbe840 base: add Activate to enable log of particular targets Yan Lee 2023-05-15 00:27:22 -07:00
  • ae7476bcdc arch-gcn3,arch-vega: Fix ds_read2st64_b32 Matthew Poremba 2023-05-12 18:28:00 -05:00
  • 8dac7f572b arch-riscv: Refactor RVC decode flow when funct4==0b1001 and op==C2 Roger Chang 2023-05-08 14:30:04 +08:00
  • d2aed4f5c5 arch-riscv: Treat RVC HINT as nops rather than trap Roger Chang 2023-05-08 14:06:21 +08:00
  • 27967a40de arch-riscv: Fix the fflags issue for fcvt_d_w, fcvt_d_wu, fcvt_d_l fcvt_d_lu Roger Chang 2023-05-08 16:18:48 +08:00
  • 331ef9e82b arch-riscv: Add missing zbkb instructions Roger Chang 2023-05-11 14:26:56 +08:00
  • 0fa843c9cb arch-arm: VMPIDR_EL2 can be used in secure mode as well Giacomo Travaglini 2023-02-06 17:04:47 +00:00
  • fbca328487 arch-arm: Remove clear32/64 methods Giacomo Travaglini 2023-02-06 16:20:33 +00:00
  • db47e9f9a1 arch-arm: Remove ISA::initID64 Giacomo Travaglini 2023-02-06 10:53:14 +00:00
  • e3db30912e arch-arm: Rewrite ISA::initID64 using BitUnions Giacomo Travaglini 2023-02-06 09:58:28 +00:00
  • b7c16f0dad arch-arm: Remove ISA::initID32 Giacomo Travaglini 2023-02-03 19:38:24 +01:00
  • 7abece9d0f arch-arm: Rewrite ISA::initID32 using BitUnions Giacomo Travaglini 2023-02-06 08:49:02 +00:00
  • c3769affa4 arch-arm: Move MISCREG init logic from ISA to reset field Giacomo Travaglini 2023-02-03 15:38:59 +01:00
  • ec491446f3 arch-arm: Fix read redirection for MIDR register Giacomo Travaglini 2023-02-03 19:22:44 +01:00
  • 89483caebd arch-arm: Map CTR_EL0 to AArch32 version Giacomo Travaglini 2023-02-07 10:05:41 +00:00
  • 1aa8f14f2c arch-arm: Map MPIDR_EL1 to AArch32 version Giacomo Travaglini 2023-02-07 09:25:23 +00:00
  • 9dcafac2e7 arch-arm: Map MIDR_EL1 to AArch32 version Giacomo Travaglini 2023-02-03 19:18:55 +01:00
  • 0d1161c56e arch-arm: Map MVFR0_EL1/MVFR1_EL1 to AArch32 version Giacomo Travaglini 2023-02-03 16:02:45 +01:00
  • acdf3a63de arch-arm: Generalize SCTLR_RST behaviour Giacomo Travaglini 2023-02-03 15:00:42 +01:00
  • 72f08cca89 arch-arm: Make MISCREGs reset value configurable Giacomo Travaglini 2023-02-03 15:08:56 +01:00
  • cb15939bdf arch-arm: Replace 0ing of miscRegs with assignment of reset value Giacomo Travaglini 2023-02-03 15:03:06 +01:00
  • bc4322ede9 configs: Add --pmu-{dump,reset}-stats-on to Arm baremetal.py. Richard Cooper 2022-09-14 14:59:15 +01:00
  • add5e51e49 arch-arm: Add support to exit the simloop on PMU interrupt Richard Cooper 2023-05-03 18:36:00 +01:00
  • 5fc8188ab3 arch-arm: Add support to exit the simloop on PMU control Nicholas Lindsay 2018-06-07 14:48:03 +01:00
  • e90bd5feb9 configs: Add --with-pmu option to the simple Arm FS configs Richard Cooper 2023-04-06 11:41:06 +01:00
  • 6dd60a6c1a base,arch,mem: Remove {GE}M5_VAR_USED instances Bobby R. Bruce 2023-05-08 10:54:56 -07:00
  • fcb36458e2 misc: Fix 'unused variable' clang errors with gem5.fast Bobby R. Bruce 2023-05-04 17:16:28 -07:00
  • c0103aa2c6 cpu-o3: Remove duplicated O3 stats Melissa Jost 2023-03-20 00:57:09 -07:00
  • f969c08ee2 cpu: Remove duplicate base inst and op stats Melissa Jost 2023-03-20 02:13:57 -07:00
  • 7403a298cc cpu: Remove duplicated execute stats Melissa Jost 2023-03-20 00:34:31 -07:00
  • 1cf1867ffa cpu: Remove duplicated commit stats Melissa Jost 2023-03-20 00:17:38 -07:00
  • 19323c8bd7 cpu: Remove duplicated fetch stats Melissa Jost 2023-03-20 00:01:53 -07:00
  • a882373e82 cpu-kvm: Implement IPC and CPI base stats for KVM CPU Melissa Jost 2023-03-13 11:25:59 -07:00
  • 1d035e1e20 cpu-o3: Copy O3 IEW stats to BaseCPU::ExecuteCPUStats Melissa Jost 2023-03-13 11:24:37 -07:00
  • 53a12bc8ad cpu-o3: Copy general O3 fetch stats to BaseCPU::FetchCPUStats Melissa Jost 2023-03-13 11:10:14 -07:00
  • 4b70c1cacc cpu-o3: Use base instructions committed counters in O3CPU Melissa Jost 2023-03-13 10:55:55 -07:00
  • 2f93672bdd cpu: Move numInsts, numOps, ipc, cpi to BaseCPU Melissa Jost 2023-03-13 03:09:38 -07:00
  • ea2bbe26fc cpu: Move commit stats from simple to base cpu Melissa Jost 2023-03-13 02:55:56 -07:00
  • 32b18dcc60 cpu: Move execute stats from simple and minor to base Melissa Jost 2023-03-13 02:34:14 -07:00
  • cf6783d6ac cpu: Move fetch stats from simple and minor to base Melissa Jost 2023-03-13 01:59:16 -07:00
  • aff1bfe491 scons: Fix gem5 Python3.11 build. Richard Cooper 2023-04-27 18:59:42 +01:00
  • 8d5c9f90d5 fastmodel: Remove sendFunc Wei-Han Chen 2023-04-28 05:36:16 +00:00
  • d049d41ef0 arch-riscv: Add RV32 only Zk instruction extensions Roger Chang 2023-04-19 21:30:58 +08:00
  • 2dafebb4b9 arch-riscv: seperate RV32 and RV64 Zk extensions Roger Chang 2022-11-29 16:29:01 +08:00
  • dd5b1a674e dev-amdgpu: Remove unused psp_ring_retval integer Melissa Jost 2023-05-01 15:55:00 -07:00
  • 8659b9e1af dev-amdgpu: Update vega10_kvm.py to add checkpointing instruction Vishnu Ramadas 2023-04-26 14:34:22 -05:00
  • 916bcbb4c4 arch-riscv: Remove Riscv32CPU instance Roger Chang 2023-01-03 10:31:12 +08:00
  • a02f1f6c05 tests: Revert "arch-riscv: add RV32 ADFIMU_Zfh instruction tests" Roger Chang 2023-04-27 02:28:09 +00:00
  • cd76f92c94 arch-vega: Add decodings for new MI100 VOP2 insts Matthew Poremba 2023-04-21 19:36:47 -05:00
  • 316538bf8a dev-amdgpu: Enable more GPUs with device specific registers Matthew Poremba 2023-04-21 19:22:28 -05:00
  • 8b91ac6f8d dev-amdgpu: Refactor MMIO interface for SDMA engines Matthew Poremba 2023-04-21 19:15:40 -05:00
  • 6c1b95ea41 dev-amdgpu: Default MMIO reads when previously written Matthew Poremba 2023-04-21 14:07:01 -05:00
  • 9c3107c762 dev-amdgpu,configs: Add human readable names for different GPUs Matthew Poremba 2023-04-21 14:05:50 -05:00
  • f5af8b5876 dev-amdgpu: Add a few MQD attributes to GPUFS checkpoint Vishnu Ramadas 2023-04-26 13:04:51 -05:00
  • 74fcc4d6b7 arch-riscv: refactor bitfields of insts Xuan Hu 2023-03-20 19:07:03 +08:00
  • 540c3fc7ef arch: Add vector function unit and OpClass enums Yang Liu 2023-01-10 14:29:52 +08:00
  • 74072cdc80 base: Update <experimental/filesystem> include Melissa Jost 2023-04-13 11:45:17 -07:00
  • 912795afd3 scons: Add stdc++fs and libc++experimental for clang LIBS env Melissa Jost 2023-04-13 11:40:37 -07:00
  • 6fdf0beedc stdlib: write device tree after setting up bootloader in ARMBoard Hoa Nguyen 2023-04-20 18:47:16 -07:00
  • c597361a6b dev-amdgpu: Add writeROM method Matthew Poremba 2023-04-21 13:57:51 -05:00
  • c2c5cd1048 configs: Allow other CPU types in GPUFS Matthew Poremba 2023-04-20 13:18:26 -05:00
  • 70ef9b219c configs: Add simple check for valid GPU MMIO trace Matthew Poremba 2023-04-20 13:16:36 -05:00
  • 2f3f73a098 configs: Use higher dmesg level for GPUFS Matthew Poremba 2023-04-20 13:12:10 -05:00
  • c127a38f48 base: Use <experimental/filesystem> include for GCC v7 Melissa Jost 2023-04-14 17:02:01 -07:00
  • e7ae5290f5 base: Fix VNC server initialization Yen-lin Lai 2023-04-13 10:45:58 +08:00
  • 09023d4158 mem-ruby: Not flushing data to memory when there's no dirty block Hoa Nguyen 2023-04-16 19:36:27 +00:00
  • 76d1d024da stdlib: Fix SwitchableProcessor use in SE mode Bobby R. Bruce 2023-03-15 16:29:59 -07:00
  • 851e469e55 scons: Add "--no-duplicate-sources" option to SConstruct in util/ Hoa Nguyen 2023-04-13 14:20:23 -07:00
  • 9ec1b93980 configs: Add --exit-on-uart-eot flag to Arm baremetal.py config Richard Cooper 2023-03-21 13:39:18 +00:00
  • 80eb8be3cf configs: Update Arm simple configs to enable --interactive option Richard Cooper 2022-09-09 12:36:43 +01:00
  • c8496d8c4d configs: Add the O3 CPU as an option to baremetal.py Richard Cooper 2022-10-04 10:51:38 +01:00
  • 5138092607 configs: Make the configuration of the gicv4 parameter robust Richard Cooper 2022-09-08 20:57:03 +01:00
  • a83f699f1d configs: Add Tarmac tracing option to the simple Arm configs Richard Cooper 2022-09-08 18:46:16 +01:00
  • 324ac185c8 arch-arm: Add an option to use 64-bit PMU counters Richard Cooper 2022-09-08 18:30:14 +01:00
  • ed9effca73 dev-arm: Fix writes to Arm GICv2 GICD_IGROUPRn Richard Cooper 2022-09-08 18:10:44 +01:00
  • 06637a29e5 arch-arm: Add more detailed debug messages to GICv2. Richard Cooper 2022-09-14 14:17:18 +01:00
  • 27aab0fb35 arch-arm: Fix formatting of v8 Tarmac Register records Richard Cooper 2022-09-08 17:26:50 +01:00
  • dcc14ba948 configs: Update Arm starter_se.py for new CpuCluster abstraction Richard Cooper 2023-03-21 23:26:00 +00:00
  • d02cba93c3 cpu: Add CpuCluster method to allow querying the number of CPUs. Richard Cooper 2023-03-21 23:35:38 +00:00
  • 640891ac41 scons: Fix "no-duplicate-sources" to include .hh when not set Bobby R. Bruce 2023-04-12 14:00:57 -07:00
  • d95890d2a7 python: Fix broken call to m5.fatal in _check_tracing() Richard Cooper 2021-09-16 16:04:08 +01:00
  • 6c4f405669 arch-riscv: Insert symbol table of bootloader into debug symbol table in bare metal workload Roger Chang 2023-04-12 15:57:50 +08:00
  • 0af4b60acb base: fatal() if a socket path doesn't fit in sockaddr_un.sun_path. Gabe Black 2023-04-12 00:32:51 -07:00
  • 716c154b51 arch,base,dev,sim: Convert objects to use the HostSocket param type. Gabe Black 2023-03-18 20:27:55 -07:00
  • 2a44f3bfc7 base: Remove the now unused UnixSocketAddr class and associated code. Gabe Black 2023-03-18 23:17:12 -07:00
  • 57aaccdeff base,python: Add a param type for host sockets. Gabe Black 2023-03-18 20:25:11 -07:00
  • e4a46cb09d arch-riscv: Refactor the shouldCheckPMP function Roger Chang 2023-04-07 16:47:52 +08:00
  • e37b1d1d92 arch-riscv: Fix the address check of pmp Roger Chang 2023-04-07 16:47:52 +08:00
  • f9cf3de711 mem: Use HostSocket in the SharedMemoryServer. Gabe Black 2023-03-18 23:10:03 -07:00
  • e79d6616dd base: Use <experimental/filesystem> include for GCC v7 Bobby R. Bruce 2023-04-10 17:07:18 -07:00
  • 1258f481c9 scons: Add '-lstdc++fs' to LIBS env when GCC version < 9 Bobby R. Bruce 2023-04-10 16:42:46 -07:00
  • 7eff90acdc base: Add support for unix domain sockets in ListenSocket. Gabe Black 2023-03-18 16:37:23 -07:00
  • f15ddf8206 configs: Fix RISCVMatched Test Melissa Jost 2023-04-06 15:36:39 -07:00
  • 5a943ce5a5 util: Add a missing free() to m5term. Gabe Black 2023-04-08 04:50:56 -07:00
  • d632bba119 stdlib: small fix in spec-2006 and spec-2007 HJikram 2023-04-08 00:38:17 +05:00
  • 2f5c87c7c6 dev: Add an "abortPending" method to the DMA port class. Gabe Black 2023-03-29 02:31:13 -07:00
  • c98d0d2f93 base: Add missing headers in extensible.hh Wei-Han Chen 2023-03-30 06:30:15 +00:00
  • 179dfe521b util: Make m5term able to connect to unix domain sockets. Gabe Black 2023-03-18 22:05:47 -07:00