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  • 82587ce71b stdlib: Refactor gem5 Vision/gem5-resources code Bobby R. Bruce 2023-06-12 14:09:15 -07:00
  • 328aaa626f arch-riscv: Fix unexpected behavior of float operations in Mac OS Roger Chang 2023-06-13 17:25:47 +08:00
  • 694673f1d7 arch: set multiline re as default in isa_parser Yu-hsin Wang 2023-05-30 13:27:01 +08:00
  • 23a88d0400 fastmodel: only support single line literal when paring project file Yu-hsin Wang 2023-05-30 13:26:18 +08:00
  • f4559a703f configs: Fix SPEC benchmarks example scripts Ayaz Akram 2023-06-14 11:03:33 -07:00
  • 9a27322c7b arch-riscv: Fix unexpected behavior of float operations in Mac OS Roger Chang 2023-06-13 17:25:47 +08:00
  • 28777e1114 python: Ignore -s as gem5 option Jason Lowe-Power 2023-06-12 15:31:04 -07:00
  • d89ba08eb0 python: Ignore -s as gem5 option Jason Lowe-Power 2023-06-12 15:31:04 -07:00
  • 55cecfc3e8 misc: Remove 'run-name' from workflow yaml files Bobby R. Bruce 2023-06-12 21:00:28 -07:00
  • 2024546951 misc: Update GitHub Actions Workflow names Bobby R. Bruce 2023-06-12 20:50:36 -07:00
  • 5ca9541037 misc: Add 'synchronize' as CI Test action. Remove 'reopen' Bobby R. Bruce 2023-06-12 20:47:47 -07:00
  • 9c1603119c misc: Increase timeout for GitHub Actions Melissa Jost 2023-06-12 14:37:51 -07:00
  • 0fef2300c0 arch-riscv: Refactor fmax and fmin instructions Roger Chang 2023-06-12 14:06:57 +08:00
  • 2e2f869901 misc: Adjust timeout for compiler tests Melissa Jost 2023-06-09 15:54:32 -07:00
  • f78471fb81 tests: Reducing json stat dump size. Mahyar Samani 2023-06-08 14:56:50 -07:00
  • cc564c8931 misc: Add weekly tests to Github workflows Melissa Jost 2023-06-08 14:25:06 -07:00
  • 27492d9d18 misc: Update GitHub yaml files Melissa Jost 2023-06-08 14:23:11 -07:00
  • 1ae409d627 stdlib: Add U74VecFU to U74CPU Roger Chang 2023-06-03 10:30:38 +08:00
  • d33c41118b arch-riscv,cpu-minor: Add MinorDefaultVecFU for risc-v v-ext Xuan Hu 2023-01-17 21:08:57 +08:00
  • f467cf79fd util: Add util for GitHub runner configuration Melissa Jost 2023-05-30 16:44:32 -07:00
  • 90067c6ce4 configs: GPUFS: Only use parallel eventqs for KVM Matthew Poremba 2023-06-08 10:54:10 -05:00
  • c644eae2dd configs,gpu-compute: Kernel dispatch-based exit events Matthew Poremba 2023-06-08 10:50:23 -05:00
  • 8219b1961a scons: Fix grpc protobuf actions Roger Chang 2023-06-05 14:32:18 +08:00
  • 3322127793 tests: Fix bugs related to gem5 Vision KUNAL PAI 2023-06-07 15:30:15 -07:00
  • 25d7badcc1 tests: Fix bugs related to gem5 Vision KUNAL PAI 2023-06-07 15:30:15 -07:00
  • 77ac6eacd9 mem-cache: De-virtualize forEachBlk() in tags Daniel R. Carvalho 2023-05-27 09:47:56 -03:00
  • 685a5cd017 scons: Fix grpc protobuf actions Roger Chang 2023-06-05 14:32:18 +08:00
  • 4434d48973 arch-arm: Apply FEAT_IDST to missing ID registers Giacomo Travaglini 2023-06-02 09:24:42 +01:00
  • 70ec55ce2a stdlib, tests, configs: Introduce gem5 Vision to resources Kunal Pai 2023-05-21 23:35:40 -07:00
  • ad0a2d1bea misc: Adding GitHub workflow files Melissa Jost 2023-06-05 16:40:16 -07:00
  • ffbf73db1d stdlib, tests, configs: Introduce gem5 Vision to resources Kunal Pai 2023-05-21 23:35:40 -07:00
  • b355baac93 dev-arm: Treat GICv3 reserved addresses as RES0 Giacomo Travaglini 2023-05-31 13:57:12 +01:00
  • 942a9ea503 stdlib: Add U74VecFU to U74CPU Roger Chang 2023-06-03 10:30:38 +08:00
  • 14f919a67e arch-riscv,cpu-minor: Add MinorDefaultVecFU for risc-v v-ext Xuan Hu 2023-01-17 21:08:57 +08:00
  • 5e5e81d1c5 arch-riscv: Check FPU status for c.flwsp c.fldsp c.fswsp c.fsdsp Roger Chang 2023-06-02 17:00:59 +08:00
  • cf2d5b68a9 gpu-compute: Gfx version check for FS and SE mode Matthew Poremba 2023-05-30 13:57:09 -05:00
  • a74695f5bc stdlib: Fix incorrect path and checks for DRAMsim3 Bobby R. Bruce 2023-05-30 10:43:52 -07:00
  • 917ced812c stdlib: Fix incorrect path and checks for DRAMsim3 Bobby R. Bruce 2023-05-30 10:43:52 -07:00
  • ebd5b3e4ae gpu-compute: Gfx version check for FS and SE mode Matthew Poremba 2023-05-30 13:57:09 -05:00
  • bd1d72f61e fastmodel: add src include path by default Yu-hsin Wang 2023-05-31 11:25:07 +08:00
  • 32df25e426 mem: HBMCtrl changes to allow PC data buses to be in different states Ayaz Akram 2022-11-10 13:26:44 -08:00
  • 65d077d795 base: Output link to common errors page Melissa Jost 2023-05-25 15:42:20 -07:00
  • 741af7ddae mem: Add a DDR5 memory interface Ayaz Akram 2023-02-21 15:16:38 -08:00
  • e0a28b1a27 stdlib: Edit RISCVMatched Configuration KUNAL PAI 2023-05-19 14:38:48 -07:00
  • 5095e29c8e arch-arm: Implement FEAT_HCX Giacomo Travaglini 2023-04-17 13:09:49 +01:00
  • 0fae6e8163 arch-arm: Implement FEAT_EVT Giacomo Travaglini 2023-04-15 09:19:31 +01:00
  • 9de1443ebb arch-arm: Add support for Armv8.2-I8MM NEON extension. Richard Cooper 2020-11-09 19:05:09 +00:00
  • eb4f83b178 arch-arm: Add support for Armv8.2-DotProd NEON extension. Richard Cooper 2020-11-09 18:56:31 +00:00
  • fab3d8a1c1 arch-arm: Fix too long lines in existing Arm NEON instructons. Richard Cooper 2020-11-09 18:50:16 +00:00
  • d02ea0dfbb arch-arm, cpu, configs: Add new Op Classes for Matrix Multiply insts Richard Cooper 2020-10-28 22:10:01 +00:00
  • 560df49c28 arch-arm: Declare support for Armv8.2-I8MM. Richard Cooper 2020-10-08 19:40:15 +01:00
  • f8b60b7a1d arch-arm: Added Armv8.2-I8MM SVE mixed-sign dot product instrs. Richard Cooper 2020-10-01 18:31:49 +01:00
  • 9421a46d71 arch-arm: Re-factor Arm decoder for SVE mixed-sign DOT insts. Richard Cooper 2020-09-29 16:15:23 +01:00
  • 98e67c8610 arch-arm: Add support for Arm SVE Integer Matrix instructions. Richard Cooper 2020-09-28 17:50:52 +01:00
  • 0f857873f9 arch-arm: Declare support for Armv8.2-F64MM. Richard Cooper 2020-10-08 19:35:47 +01:00
  • 8bf89d6967 arch-arm: Added 128-bit encodings of SVE TRN, UZP, and ZIP insts. Richard Cooper 2020-09-18 16:40:45 +01:00
  • 19e8023043 arch-arm: Support Arm SVE Load-Broadcast Octaword instructions. Richard Cooper 2020-09-14 18:55:09 +01:00
  • 94a629b527 arch-arm: Add support for Arm SVE fmmla instruction. Richard Cooper 2020-08-21 20:11:31 +01:00
  • 87ec6919a3 mem: Handle DRAM write queue drain and disabled power down Matthew Poremba 2023-04-19 15:57:47 -05:00
  • 6b4a1020be configs,dev-amdgpu: GPUFS MI200/gfx90a support Matthew Poremba 2023-05-05 10:50:48 -05:00
  • 2aa95ccc7d arch-x86: Fix CPUID function 0 Matthew Poremba 2023-05-19 13:39:43 -05:00
  • dc76c00c9b arch-arm: Add an ArmAllRelease containing every defined extension Giacomo Travaglini 2023-05-24 13:10:16 +01:00
  • dfa3c073cf arch-arm,cpu: Add four Arm SVE2 int instructions Prajwal Hegde 2023-04-27 14:38:36 -05:00
  • 2579bacf06 arch-riscv: Merge rv32 and rv64 version of xperm4 and xperm8 Roger Chang 2023-05-13 23:09:48 +08:00
  • 5fa81af8c6 arch-riscv: Simplify the rev8 and brev8 instructions Roger Chang 2023-05-13 23:04:46 +08:00
  • 4dccd7dd6c arch-riscv: Add BS format isa Roger Chang 2023-05-13 21:42:39 +08:00
  • 1a2904e021 scons: Add os import to marshall Jason Lowe-Power 2023-05-23 08:41:31 -07:00
  • d537ded9d2 arch-arm: Fix printing of VecElemClass registers Giacomo Travaglini 2023-05-16 15:42:00 +01:00
  • 4d18546bfb dev-amdgpu: Update SDMA checkpointing Matthew Poremba 2023-05-22 16:03:58 -05:00
  • 332ef131dc scons: fix build failed caused by Non-ASCII directory path Luming Wang 2023-05-20 17:29:59 +08:00
  • 7b91521c60 arch-arm: Define a AA64ZFR0 data type Giacomo Travaglini 2023-04-14 11:02:07 +01:00
  • 3787ab5b20 arch-arm: Rename AdvSIMD instruction pool Giacomo Travaglini 2023-04-13 10:52:06 +01:00
  • ae115fcfd5 arch-arm: Implement FEAT_IDST Giacomo Travaglini 2023-03-07 22:33:31 +00:00
  • e005e6f250 arch-arm: Implement trapping of SME registers Giacomo Travaglini 2023-03-08 07:59:35 +00:00
  • 1629ee71c7 arch-arm: Implement FEAT_RNG Giacomo Travaglini 2023-03-07 16:13:45 +00:00
  • 2a5c427c5c arch-arm: Extend SCR to be 64-bit wide Giacomo Travaglini 2023-03-07 16:59:16 +00:00
  • e3d2191b73 arch-arm: Implement FEAT_FLAGM(2) Giacomo Travaglini 2023-03-06 19:37:39 +00:00
  • 223a07031f arch-arm: Improve debugging of CC regs accesses Giacomo Travaglini 2023-03-07 14:58:15 +00:00
  • 3b3911f521 arch-arm: Split decodeDataProcReg into subfunctions Giacomo Travaglini 2023-03-07 12:40:24 +00:00
  • 98821e365c arch-arm: Extend auxiliary vector with AT_HWCAP2 entry Giacomo Travaglini 2023-05-18 10:47:55 +01:00
  • a3cae50401 arch-arm: Enable FEAT_PAuth in SE mode Giacomo Travaglini 2023-05-17 15:34:50 +01:00
  • 00426eea99 arch-arm: Define remaining fields of the arm64 AT_HWCAP entry Giacomo Travaglini 2023-05-17 15:33:34 +01:00
  • 4198d027ac tests,systemc: Fix nightly systemc test Bobby R. Bruce 2023-05-22 13:59:24 -07:00
  • 9c0f337d78 arch-riscv: Simplify amd merge RV32/RV64 the RVM instructions Roger Chang 2023-05-12 23:22:14 +08:00
  • 08644a7670 dev-amdgpu: Fix nbio psp ring assert Matthew Poremba 2023-05-16 19:46:50 -05:00
  • 44919c1c4d configs: Update riscv/fs_linux.py script Ayaz Akram 2023-04-30 16:25:04 -07:00
  • c4d61ca143 tests: Add '--duplicate-sources' to libgem5 SST build Bobby R. Bruce 2023-05-10 12:19:38 -07:00
  • fccd13ac85 scons: default to not duplicating sources in the build directory Alex Richardson 2023-03-08 09:37:34 +00:00
  • bc63da39dc arch-riscv: Fix WFI for O3 CPU Bobby R. Bruce 2023-05-15 17:25:59 -07:00
  • aff1ddb196 arch-arm: Implement FEAT_TLBIOS Giacomo Travaglini 2022-07-21 16:14:18 +01:00
  • 20bf5e17e3 arch-arm: Extend SCTLR to be 64-bit wide Giacomo Travaglini 2023-02-21 13:25:02 +00:00
  • 60dd3c7d05 arch-arm: Simplify FPSCR writes Giacomo Travaglini 2023-02-08 10:48:29 +00:00
  • 3e1b9dfc0f arch-arm: Remove unnecessary case in ISA::readMiscReg Giacomo Travaglini 2023-02-07 15:26:47 +00:00
  • f72d22cc38 arch-arm: Implement RES0/RES1 with miscreg specifiers Giacomo Travaglini 2023-02-07 14:47:40 +00:00
  • bc5b00cd2b arch-arm: Group self hosted debug writes in ISA switch Giacomo Travaglini 2023-02-07 11:12:23 +00:00
  • 32b4ab376c arch-arm: Update MISCREG_DBGDIDR to point to Armv8 debug arch Giacomo Travaglini 2023-02-07 10:56:30 +00:00
  • 7c735d131d arch-arm: Implement RAZ/WI with raz specifier Giacomo Travaglini 2023-02-07 10:03:04 +00:00
  • c85aa11ad0 arch-arm: Provide default mask for raz/rao helpers Giacomo Travaglini 2023-02-07 10:29:42 +00:00
  • de2503f7ce arch-arm: Move RO values from ISA::read to the reset field Giacomo Travaglini 2023-02-07 09:49:53 +00:00
  • 9ef7be902b arch-arm: Add UNSERIALIZE flag to address cpt compatibility Giacomo Travaglini 2023-05-10 15:51:12 +01:00