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arch-arm: Apply FEAT_IDST to missing ID registers

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When FEAT_IDST got implemented [1], we forgot to add the
logic for AArch64 ID registers tracking AArch32 state/capabilities

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/70723

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I19bddf67ecc379a14f91cfede385692536982101
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/71178
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Giacomo Travaglini
2023-06-02 09:24:42 +01:00
parent 70ec55ce2a
commit 4434d48973
1 changed files with 21 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
src/arch/arm/regs/misc.cc
View File

@@ -3911,83 +3911,104 @@ ISA::initializeMiscRegMetadata()
.mapsTo(MISCREG_MIDR);
InitReg(MISCREG_MPIDR_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.mapsTo(MISCREG_MPIDR);
InitReg(MISCREG_REVIDR_EL1)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid1))
.allPrivileges().exceptUserMode().writes(0);
InitReg(MISCREG_ID_PFR0_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_PFR0);
InitReg(MISCREG_ID_PFR1_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_PFR1);
InitReg(MISCREG_ID_DFR0_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_DFR0);
InitReg(MISCREG_ID_AFR0_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_AFR0);
InitReg(MISCREG_ID_MMFR0_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_MMFR0);
InitReg(MISCREG_ID_MMFR1_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_MMFR1);
InitReg(MISCREG_ID_MMFR2_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_MMFR2);
InitReg(MISCREG_ID_MMFR3_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_MMFR3);
InitReg(MISCREG_ID_MMFR4_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_MMFR4);
InitReg(MISCREG_ID_ISAR0_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR0);
InitReg(MISCREG_ID_ISAR1_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR1);
InitReg(MISCREG_ID_ISAR2_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR2);
InitReg(MISCREG_ID_ISAR3_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR3);
InitReg(MISCREG_ID_ISAR4_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR4);
InitReg(MISCREG_ID_ISAR5_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR5);
InitReg(MISCREG_ID_ISAR6_EL1)
.allPrivileges().exceptUserMode().writes(0)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.mapsTo(MISCREG_ID_ISAR6);
InitReg(MISCREG_MVFR0_EL1)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.allPrivileges().exceptUserMode().writes(0)
.mapsTo(MISCREG_MVFR0);
InitReg(MISCREG_MVFR1_EL1)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.allPrivileges().exceptUserMode().writes(0)
.mapsTo(MISCREG_MVFR1);
InitReg(MISCREG_MVFR2_EL1)
.faultRead(EL0, faultIdst)
.faultRead(EL1, HCR_TRAP(tid3))
.allPrivileges().exceptUserMode().writes(0);
InitReg(MISCREG_ID_AA64PFR0_EL1)