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arch-arm: Rename AdvSIMD instruction pool

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The decoding function was wrongly named decodeNeon3SameExtra,
referring to the "AdvSIMD three same Extra" instruction pool

This might be an old name as I can only find the
"AdvSIMD *scalar* three same Extra" in the Arm arm. The
encoding space reserved to the pool bears the
"Advanced SIMD three-register extension" name; we
therefore rename the function to decodeNeon3RegExtension

Change-Id: I056da8f0c7808935d12a4b05490d30654178071f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70724
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
This commit is contained in:
Giacomo Travaglini
2023-04-13 10:52:06 +01:00
parent ae115fcfd5
commit 3787ab5b20
2 changed files with 4 additions and 4 deletions
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2
src/arch/arm/isa/formats/aarch64.isa
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@@ -2461,7 +2461,7 @@ namespace Aarch64
return new Unknown64(machInst);
}
} else if (bits(machInst, 15) == 1) {
return decodeNeon3SameExtra<DecoderFeatures>(machInst);
return decodeNeon3RegExtension<DecoderFeatures>(machInst);
} else if (bits(machInst, 10) == 1) {
if (bits(machInst, 23, 22))
return new Unknown64(machInst);

6
src/arch/arm/isa/formats/neon64.isa
View File

@@ -39,9 +39,9 @@ namespace Aarch64
// AdvSIMD three same
template <typename DecoderFeatures>
StaticInstPtr decodeNeon3Same(ExtMachInst machInst);
// AdvSIMD three same Extra
// AdvSIMD three register extension
template <typename DecoderFeatures>
StaticInstPtr decodeNeon3SameExtra(ExtMachInst machInst);
StaticInstPtr decodeNeon3RegExtension(ExtMachInst machInst);
// AdvSIMD three different
inline StaticInstPtr decodeNeon3Diff(ExtMachInst machInst);
// AdvSIMD two-reg misc
@@ -507,7 +507,7 @@ namespace Aarch64
template <typename DecoderFeatures>
StaticInstPtr
decodeNeon3SameExtra(ExtMachInst machInst)
decodeNeon3RegExtension(ExtMachInst machInst)
{
uint8_t q = bits(machInst, 30);
uint8_t size = bits(machInst, 23, 22);