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arch-riscv,cpu-minor: Add MinorDefaultVecFU for risc-v v-ext

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Change-Id: Id5c5ae5fa1901154cadeb0a4958703f3f15d491f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67295
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Xuan Hu
2023-01-17 21:08:57 +08:00
committed by Roger Chang
parent 5e5e81d1c5
commit 14f919a67e
1 changed files with 28 additions and 0 deletions
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28
src/cpu/minor/BaseMinorCPU.py
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@@ -250,6 +250,33 @@ class MinorDefaultMiscFU(MinorFU):
opLat = 1
class MinorDefaultVecFU(MinorFU):
opClasses = minorMakeOpClassSet(
[
"VectorUnitStrideLoad",
"VectorUnitStrideStore",
"VectorUnitStrideMaskLoad",
"VectorUnitStrideMaskStore",
"VectorStridedLoad",
"VectorStridedStore",
"VectorIndexedLoad",
"VectorIndexedStore",
"VectorUnitStrideFaultOnlyFirstLoad",
"VectorWholeRegisterLoad",
"VectorWholeRegisterStore",
"VectorIntegerArith",
"VectorFloatArith",
"VectorFloatConvert",
"VectorIntegerReduce",
"VectorFloatReduce",
"VectorMisc",
"VectorIntegerExtension",
"VectorConfig",
]
)
opLat = 1
class MinorDefaultFUPool(MinorFUPool):
funcUnits = [
MinorDefaultIntFU(),
@@ -260,6 +287,7 @@ class MinorDefaultFUPool(MinorFUPool):
MinorDefaultPredFU(),
MinorDefaultMemFU(),
MinorDefaultMiscFU(),
MinorDefaultVecFU(),
]