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cf83aec07a039652eccc7a7b12493f1d68bc1a29
gem5/src/arch/arm
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Giacomo Travaglini cf83aec07a arch-arm: Using 16 bit VMID 
Change-Id: Ia4f408b8e84b5f52f6b48fd5d4bbc2a5fac87154
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45186
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-17 10:22:41 +00:00
..
fastmodel
fastmodel: handling amba far atomic transaction
2021-04-29 03:46:39 +00:00
freebsd
arch-arm: Pull everything not purely public out of registers.hh.
2021-04-10 01:10:57 +00:00
insts
misc: Add missing compiler.hh include
2021-05-14 10:02:14 +00:00
isa
misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.
2021-05-11 20:16:31 +00:00
kvm
misc: Collapse all uses of DTRACE(x) to Debug::x.
2021-05-10 20:00:48 +00:00
linux
misc: Replace M5_ALIGNED with GEM5_ALIGNED.
2021-05-11 20:16:31 +00:00
regs
misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.
2021-05-11 20:16:31 +00:00
tracers
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
aapcs32.hh
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
aapcs64.hh
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
aapcs64.test.cc
arm: Add a unit test for some aspects of the aapcs64 ABI.
2020-04-29 11:30:58 +00:00
ArmFsWorkload.py
arch-arm: inform bootloader of kernel position with a register
2021-01-13 11:32:19 +00:00
ArmInterrupts.py
arm: Delete authors lists from the arm files.
2020-02-18 03:35:23 +00:00
ArmISA.py
misc: Merge branch v20.1.0.3 hotfix into develop
2021-02-03 11:48:51 -08:00
ArmMMU.py
misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-21 09:33:39 +00:00
ArmNativeTrace.py
arm: Delete authors lists from the arm files.
2020-02-18 03:35:23 +00:00
ArmPMU.py
arch-arm: add official names to all PMU events
2020-11-26 16:25:10 +00:00
ArmSemihosting.py
arch-arm, dev-arm: Consistently use ISO prefixes
2021-01-24 18:44:21 +00:00
ArmSeWorkload.py
arm: Implement an SE workload for Linux and FreeBSD.
2020-10-28 20:34:02 +00:00
ArmSystem.py
misc: Merge branch v20.1.0.3 hotfix into develop
2021-02-03 11:48:51 -08:00
ArmTLB.py
arch: update port terminology
2020-08-26 16:48:13 +00:00
decoder.cc
arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.
2021-03-30 10:17:48 +00:00
decoder.hh
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
faults.cc
misc: Replace M5_VAR_USED with GEM5_VAR_USED.
2021-05-11 20:16:31 +00:00
faults.hh
arch,cpu,sim: Move the null and nop StaticInstPtrs to their own files.
2021-04-17 22:39:37 +00:00
fs_workload.cc
base,misc: Collapse and eliminate the ULL and LL macros.
2021-03-11 04:14:17 +00:00
fs_workload.hh
misc: Use PARAMS
2021-02-19 23:27:34 +00:00
htm.cc
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
htm.hh
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
interrupts.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
interrupts.hh
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
isa_device.cc
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
isa_device.hh
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
isa.cc
cpu,arch: Move the zero register index into RegClassInfo.
2021-04-29 12:48:47 +00:00
isa.hh
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
locked_mem.hh
arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.
2021-03-30 10:17:48 +00:00
mmu.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
mmu.hh
arch-arm: Rewrite the TLB flushing interface
2020-10-23 16:23:27 +00:00
nativetrace.cc
base,arch,dev,mem: Always compile DPRINTFs, even if they're disabled.
2021-05-10 07:31:12 +00:00
nativetrace.hh
misc: Fix coding style for enum's opening braces
2021-03-23 16:26:04 +00:00
page_size.hh
arch,dev,gpu-compute,sim: Rename isa_traits.hh page_size.hh.
2021-03-30 10:17:48 +00:00
pagetable.hh
arch-arm: Using 16 bit VMID
2021-05-17 10:22:41 +00:00
pauth_helpers.cc
arch-arm: Stop "using namespace std"
2021-01-23 22:48:45 +00:00
pauth_helpers.hh
arm: Delete authors lists from the arm files.
2020-02-18 03:35:23 +00:00
pmu.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
pmu.hh
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
process.cc
arch: Stop using deprecated M5_AT_* constants.
2021-05-11 20:16:31 +00:00
process.hh
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
qarma.cc
arch-arm: Stop "using namespace std"
2021-01-23 22:48:45 +00:00
qarma.hh
arm: Delete authors lists from the arm files.
2020-02-18 03:35:23 +00:00
reg_abi.cc
arm: Export the mostly generic syscall ABI.
2021-01-19 23:17:51 +00:00
reg_abi.hh
misc: Add missing compiler.hh include
2021-05-14 10:02:14 +00:00
remote_gdb.cc
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00
remote_gdb.hh
misc: Replace M5_ATTR_PACKED with GEM5_PACKED.
2021-05-11 20:16:31 +00:00
SConscript
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
SConsopts
arm: Delete authors lists from the arm files.
2020-02-18 03:35:23 +00:00
se_workload.hh
misc: Remove unused params() definitions
2021-02-19 23:27:34 +00:00
self_debug.cc
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
self_debug.hh
arch-arm: Consolidate register related files into a directory.
2021-03-24 23:10:38 +00:00
semihosting.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
semihosting.hh
misc: Fix remaining opening braces
2021-04-07 01:29:31 +00:00
stacktrace.hh
arch,cpu: Consolidate most of the StackTrace classes into a base class.
2020-07-11 00:24:38 +00:00
stage2_lookup.cc
arch-arm: Implementing SecureEL2 feature for Armv8
2020-07-31 13:13:57 +00:00
stage2_lookup.hh
misc: Replaced master/slave terminology
2020-09-10 23:02:28 +00:00
stage2_mmu.cc
misc: Delete the now unnecessary create methods.
2020-10-30 04:00:20 +00:00
stage2_mmu.hh
misc: Standardize the way create() constructs SimObjects.
2020-10-14 12:06:44 +00:00
system.cc
misc: Merge branch v20.1.0.3 hotfix into develop
2021-02-03 11:48:51 -08:00
system.hh
misc: Use PARAMS
2021-02-19 23:27:34 +00:00
table_walker.cc
arch-arm: Using 16 bit VMID
2021-05-17 10:22:41 +00:00
table_walker.hh
arch-arm: Using 16 bit VMID
2021-05-17 10:22:41 +00:00
tlb.cc
arch-arm: Using 16 bit VMID
2021-05-17 10:22:41 +00:00
tlb.hh
arch-arm: Using 16 bit VMID
2021-05-17 10:22:41 +00:00
tlbi_op.cc
arch-arm: Fix implementation of TLBI_VMALL instructions
2020-11-03 09:55:11 +00:00
tlbi_op.hh
arch-arm: Do not use _flushMva for TLBI IPA
2020-11-03 09:55:37 +00:00
types.hh
arch-arm: Using 16 bit VMID
2021-05-17 10:22:41 +00:00
utility.cc
misc: Add missing compiler.hh include
2021-05-14 10:02:14 +00:00
utility.hh
arch-arm: Pull everything not purely public out of registers.hh.
2021-04-10 01:10:57 +00:00
vecregs.hh
arch,cpu: Rename arch/registers.hh to arch/vecregs.hh.
2021-05-07 19:36:08 +00:00