derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

misc: Collapse all uses of DTRACE(x) to Debug::x.

Browse Source 
Also mark the DTRACE macro as deprecated.

Change-Id: I99d9a9544b539117b375186e3e425d73d3c5cab7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45009
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
This commit is contained in:
Gabe Black
2021-04-29 22:47:31 -07:00
parent 2af00af0f6
commit 41d934cf18
38 changed files with 63 additions and 62 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/arch/arm/kvm/arm_cpu.cc
View File

@@ -587,7 +587,7 @@ ArmKvmCPU::updateKvmStateCore()
setOneReg(ri->id, value);
}
if (DTRACE(KvmContext))
if (Debug::KvmContext)
dumpKvmStateCore();
}
@@ -625,7 +625,7 @@ ArmKvmCPU::updateKvmStateMisc()
}
warned = true;
if (DTRACE(KvmContext))
if (Debug::KvmContext)
dumpKvmStateMisc();
}
@@ -731,7 +731,7 @@ ArmKvmCPU::updateTCStateCore()
pc.set(getOneRegU32(REG_CORE32(usr_regs.ARM_pc)));
tc->pcState(pc);
if (DTRACE(KvmContext))
if (Debug::KvmContext)
dumpKvmStateCore();
}
@@ -764,7 +764,7 @@ ArmKvmCPU::updateTCStateMisc()
warned = true;
if (DTRACE(KvmContext))
if (Debug::KvmContext)
dumpKvmStateMisc();
}

2
src/arch/riscv/process.cc
View File

@@ -167,7 +167,7 @@ RiscvProcess::argsInit(int pageSize)
memState->setStackMin(memState->getStackMin() - (arg.size() + 1));
initVirtMem->writeString(memState->getStackMin(), arg.c_str());
argPointers.push_back(memState->getStackMin());
if (DTRACE(Stack)) {
if (Debug::Stack) {
std::string wrote;
initVirtMem->readString(wrote, argPointers.back());
DPRINTFN("Wrote arg \"%s\" to address %p\n",

3
src/base/debug.hh
View File

@@ -152,7 +152,8 @@ void dumpDebugFlags(std::ostream &os=std::cout);
* @ingroup api_trace
* @{
*/
#define DTRACE(x) (Debug::x)
#define DTRACE(x) GEM5_DEPRECATED_MACRO(DTRACE, Debug::x, \
"Replace DTRACE(x) with Debug::x.")
/** @} */ // end of api_trace
#endif // __BASE_DEBUG_HH__

8
src/base/remote_gdb.cc
View File

@@ -682,8 +682,8 @@ BaseRemoteGDB::read(Addr vaddr, size_t size, char *data)
proxy.readBlob(vaddr, data, size);
#if TRACING_ON
if (DTRACE(GDBRead)) {
if (DTRACE(GDBExtra)) {
if (Debug::GDBRead) {
if (Debug::GDBExtra) {
char buf[1024];
mem2hex(buf, data, size);
DPRINTFNR(": %s\n", buf);
@@ -699,9 +699,9 @@ BaseRemoteGDB::read(Addr vaddr, size_t size, char *data)
bool
BaseRemoteGDB::write(Addr vaddr, size_t size, const char *data)
{
if (DTRACE(GDBWrite)) {
if (Debug::GDBWrite) {
DPRINTFN("write: addr=%#x, size=%d", vaddr, size);
if (DTRACE(GDBExtra)) {
if (Debug::GDBExtra) {
char buf[1024];
mem2hex(buf, data, size);
DPRINTFNR(": %s\n", buf);

2
src/base/stats/group.cc
View File

@@ -66,7 +66,7 @@ Group::regStats()
g->regStats();
for (auto &g : statGroups) {
if (DTRACE(Stats)) {
if (Debug::Stats) {
M5_VAR_USED const SimObject *so =
dynamic_cast<const SimObject *>(this);
DPRINTF(Stats, "%s: regStats in group %s\n",

6
src/base/trace.cc
View File

@@ -148,10 +148,10 @@ OstreamLogger::logMessage(Tick when, const std::string &name,
if (!name.empty() && ignore.match(name))
return;
if (!DTRACE(FmtTicksOff) && (when != MaxTick))
if (!Debug::FmtTicksOff && (when != MaxTick))
ccprintf(stream, "%7d: ", when);
if (DTRACE(FmtFlag) && !flag.empty())
if (Debug::FmtFlag && !flag.empty())
stream << flag << ": ";
if (!name.empty())
@@ -160,7 +160,7 @@ OstreamLogger::logMessage(Tick when, const std::string &name,
stream << message;
stream.flush();
if (DTRACE(FmtStackTrace)) {
if (Debug::FmtStackTrace) {
print_backtrace();
STATIC_ERR("\n");
}

2
src/cpu/base.cc
View File

@@ -579,7 +579,7 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU)
/* This code no longer works since the zero register (e.g.,
* r31 on Alpha) doesn't necessarily contain zero at this
* point.
if (DTRACE(Context))
if (Debug::Context)
ThreadContext::compare(oldTC, newTC);
*/

2
src/cpu/kvm/base.cc
View File

@@ -279,7 +279,7 @@ BaseKvmCPU::StatGroup::StatGroup(Stats::Group *parent)
void
BaseKvmCPU::serializeThread(CheckpointOut &cp, ThreadID tid) const
{
if (DTRACE(Checkpoint)) {
if (Debug::Checkpoint) {
DPRINTF(Checkpoint, "KVM: Serializing thread %i:\n", tid);
dump();
}

4
src/cpu/kvm/x86_cpu.cc
View File

@@ -682,7 +682,7 @@ X86KvmCPU::updateKvmState()
updateKvmStateMSRs();
DPRINTF(KvmContext, "X86KvmCPU::updateKvmState():\n");
if (DTRACE(KvmContext))
if (Debug::KvmContext)
dump();
}
@@ -946,7 +946,7 @@ X86KvmCPU::updateThreadContext()
getSpecialRegisters(sregs);
DPRINTF(KvmContext, "X86KvmCPU::updateThreadContext():\n");
if (DTRACE(KvmContext))
if (Debug::KvmContext)
dump();
updateThreadContextRegs(regs, sregs);

6
src/cpu/minor/execute.cc
View File

@@ -779,7 +779,7 @@ Execute::issue(ThreadID thread_id)
if (issued) {
/* Generate MinorTrace's MinorInst lines. Do this at commit
* to allow better instruction annotation? */
if (DTRACE(MinorTrace) && !inst->isBubble()) {
if (Debug::MinorTrace && !inst->isBubble()) {
inst->minorTraceInst(*this,
cpu.threads[0]->getIsaPtr()->regClasses());
}
@@ -985,7 +985,7 @@ Execute::commitInst(MinorDynInstPtr inst, bool early_memory_issue,
if (fault != NoFault) {
if (inst->traceData) {
if (DTRACE(ExecFaulting)) {
if (Debug::ExecFaulting) {
inst->traceData->setFaulting(true);
} else {
delete inst->traceData;
@@ -1389,7 +1389,7 @@ Execute::commit(ThreadID thread_id, bool only_commit_microops, bool discard,
/* Don't show no cost instructions as having taken a commit
* slot */
if (DTRACE(MinorTrace) && !is_no_cost_inst)
if (Debug::MinorTrace && !is_no_cost_inst)
ex_info.instsBeingCommitted.insts[num_insts_committed] = inst;
if (!is_no_cost_inst)

4
src/cpu/minor/fetch1.cc
View File

@@ -254,7 +254,7 @@ Fetch1::handleTLBResponse(FetchRequestPtr response)
response->request->getPaddr() : 0),
response->request->getVaddr());
if (DTRACE(MinorTrace))
if (Debug::MinorTrace)
minorTraceResponseLine(name(), response);
} else {
DPRINTF(Fetch, "Got ITLB response\n");
@@ -423,7 +423,7 @@ Fetch1::recvTimingResp(PacketPtr response)
numFetchesInMemorySystem--;
fetch_request->state = FetchRequest::Complete;
if (DTRACE(MinorTrace))
if (Debug::MinorTrace)
minorTraceResponseLine(name(), fetch_request);
if (response->isError()) {

2
src/cpu/minor/fetch2.cc
View File

@@ -489,7 +489,7 @@ Fetch2::evaluate()
/* Output MinorTrace instruction info for
* pre-microop decomposition macroops */
if (DTRACE(MinorTrace) && !dyn_inst->isFault() &&
if (Debug::MinorTrace && !dyn_inst->isFault() &&
dyn_inst->staticInst->isMacroop())
{
dyn_inst->minorTraceInst(*this,

2
src/cpu/minor/func_unit.cc
View File

@@ -105,7 +105,7 @@ FUPipeline::FUPipeline(const std::string &name, const MinorFU &description_,
for (unsigned int i = 0; i < description.timings.size(); i++) {
MinorFUTiming &timing = *(description.timings[i]);
if (DTRACE(MinorTiming)) {
if (Debug::MinorTiming) {
std::ostringstream lats;
unsigned int num_lats = timing.srcRegsRelativeLats.size();

2
src/cpu/minor/pipeline.cc
View File

@@ -132,7 +132,7 @@ Pipeline::evaluate()
fetch2.evaluate();
fetch1.evaluate();
if (DTRACE(MinorTrace))
if (Debug::MinorTrace)
minorTrace();
/* Update the time buffers after the stages */

2
src/cpu/minor/scoreboard.cc
View File

@@ -260,7 +260,7 @@ Scoreboard::canInstIssue(MinorDynInstPtr inst,
src_index++;
}
if (DTRACE(MinorTiming)) {
if (Debug::MinorTiming) {
if (ret && num_srcs > num_relative_latencies &&
num_relative_latencies != 0)
{

4
src/cpu/o3/commit_impl.hh
View File

@@ -1312,7 +1312,7 @@ DefaultCommit<Impl>::commitHead(const DynInstPtr &head_inst, unsigned inst_num)
if (head_inst->traceData) {
// We ignore ReExecution "faults" here as they are not real
// (architectural) faults but signal flush/replays.
if (DTRACE(ExecFaulting)
if (Debug::ExecFaulting
&& dynamic_cast<ReExec*>(inst_fault.get()) == nullptr) {
head_inst->traceData->setFaulting(true);
@@ -1362,7 +1362,7 @@ DefaultCommit<Impl>::commitHead(const DynInstPtr &head_inst, unsigned inst_num)
rob->retireHead(tid);
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
head_inst->commitTick = curTick() - head_inst->fetchTick;
}
#endif

2
src/cpu/o3/decode_impl.hh
View File

@@ -700,7 +700,7 @@ DefaultDecode<Impl>::decodeInsts(ThreadID tid)
--insts_available;
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
inst->decodeTick = curTick() - inst->fetchTick;
}
#endif

2
src/cpu/o3/dyn_inst.cc
View File

@@ -93,7 +93,7 @@ BaseO3DynInst::BaseO3DynInst(const StaticInstPtr &_staticInst,
BaseO3DynInst::~BaseO3DynInst()
{
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
Tick fetch = this->fetchTick;
// fetchTick can be -1 if the instruction fetched outside the trace
// window.

2
src/cpu/o3/fetch_impl.hh
View File

@@ -1299,7 +1299,7 @@ DefaultFetch<Impl>::fetch(bool &status_change)
numInst++;
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
instruction->fetchTick = curTick();
}
#endif

2
src/cpu/o3/iew_impl.hh
View File

@@ -1603,7 +1603,7 @@ DefaultIEW<Impl>::updateExeInstStats(const DynInstPtr& inst)
iewStats.executedInstStats.numInsts++;
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
inst->completeTick = curTick() - inst->fetchTick;
}
#endif

2
src/cpu/o3/lsq_unit_impl.hh
View File

@@ -1186,7 +1186,7 @@ LSQUnit<Impl>::completeStore(typename StoreQueue::iterator store_idx)
store_inst->seqNum, store_idx.idx() - 1, storeQueue.head() - 1);
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
store_inst->storeTick =
curTick() - store_inst->fetchTick;
}

4
src/cpu/o3/mem_dep_unit_impl.hh
View File

@@ -178,7 +178,7 @@ MemDepUnit<MemDepPred, Impl>::insertBarrierSN(const DynInstPtr &barr_inst)
if (barr_inst->isWriteBarrier() || barr_inst->isHtmCmd())
storeBarrierSNs.insert(barr_sn);
if (DTRACE(MemDepUnit)) {
if (Debug::MemDepUnit) {
const char *barrier_type = nullptr;
if (barr_inst->isReadBarrier() && barr_inst->isWriteBarrier())
barrier_type = "memory";
@@ -460,7 +460,7 @@ MemDepUnit<MemDepPred, Impl>::completeInst(const DynInstPtr &inst)
assert(hasLoadBarrier());
loadBarrierSNs.erase(barr_sn);
}
if (DTRACE(MemDepUnit)) {
if (Debug::MemDepUnit) {
const char *barrier_type = nullptr;
if (inst->isWriteBarrier() && inst->isReadBarrier())
barrier_type = "Memory";

2
src/cpu/o3/rename_impl.hh
View File

@@ -807,7 +807,7 @@ DefaultRename<Impl>::sortInsts()
const DynInstPtr &inst = fromDecode->insts[i];
insts[inst->threadNumber].push_back(inst);
#if TRACING_ON
if (DTRACE(O3PipeView)) {
if (Debug::O3PipeView) {
inst->renameTick = curTick() - inst->fetchTick;
}
#endif

2
src/cpu/profile.hh
View File

@@ -86,7 +86,7 @@ class BaseStackTrace
const std::vector<Addr> &getstack() const { return stack; }
void dprintf() { if (DTRACE(Stack)) dump(); }
void dprintf() { if (Debug::Stack) dump(); }
// This function can be overridden so that special addresses which don't
// actually refer to PCs can be translated into special names. For

2
src/cpu/simple/base.cc
View File

@@ -246,7 +246,7 @@ BaseSimpleCPU::wakeup(ThreadID tid)
void
BaseSimpleCPU::traceFault()
{
if (DTRACE(ExecFaulting)) {
if (Debug::ExecFaulting) {
traceData->setFaulting(true);
} else {
delete traceData;

6
src/cpu/trace/trace_cpu.cc
View File

@@ -257,7 +257,7 @@ TraceCPU::ElasticDataGen::init()
depGraph.size());
// Print readyList
if (DTRACE(TraceCPUData)) {
if (Debug::TraceCPUData) {
printReadyList();
}
auto free_itr = readyList.begin();
@@ -509,7 +509,7 @@ TraceCPU::ElasticDataGen::execute()
} // end of while loop
// Print readyList, sizes of queues and resource status after updating
if (DTRACE(TraceCPUData)) {
if (Debug::TraceCPUData) {
printReadyList();
DPRINTF(TraceCPUData, "Execute end occupancy:\n");
DPRINTFR(TraceCPUData, "\tdepGraph = %d, readyList = %d, "
@@ -713,7 +713,7 @@ TraceCPU::ElasticDataGen::completeMemAccess(PacketPtr pkt)
depGraph.erase(graph_itr);
}
if (DTRACE(TraceCPUData)) {
if (Debug::TraceCPUData) {
printReadyList();
}

4
src/dev/net/i8254xGBe.cc
View File

@@ -1798,7 +1798,7 @@ IGbE::TxDescCache::pktComplete()
tsoPrevSeq = tsoUsedLen;
}
if (DTRACE(EthernetDesc)) {
if (Debug::EthernetDesc) {
IpPtr ip(pktPtr);
if (ip)
DPRINTF(EthernetDesc, "Proccesing Ip packet with Id=%d\n",
@@ -2291,7 +2291,7 @@ IGbE::txWire()
if (etherInt->sendPacket(txFifo.front())) {
if (DTRACE(EthernetSM)) {
if (Debug::EthernetSM) {
IpPtr ip(txFifo.front());
if (ip)
DPRINTF(EthernetSM, "Transmitting Ip packet with Id=%d\n",

4
src/dev/net/ns_gige.cc
View File

@@ -1163,7 +1163,7 @@ NSGigE::rxKick()
rxPacketBufPtr = rxPacket->data;
#if TRACING_ON
if (DTRACE(Ethernet)) {
if (Debug::Ethernet) {
IpPtr ip(rxPacket);
if (ip) {
DPRINTF(Ethernet, "ID is %d\n", ip->id());
@@ -1360,7 +1360,7 @@ NSGigE::transmit()
txFifo.size());
if (interface->sendPacket(txFifo.front())) {
#if TRACING_ON
if (DTRACE(Ethernet)) {
if (Debug::Ethernet) {
IpPtr ip(txFifo.front());
if (ip) {
DPRINTF(Ethernet, "ID is %d\n", ip->id());

4
src/dev/net/sinic.cc
View File

@@ -711,7 +711,7 @@ Device::rxKick()
switch (rxState) {
case rxFifoBlock:
if (DTRACE(EthernetSM)) {
if (Debug::EthernetSM) {
PacketFifo::iterator end = rxFifo.end();
int size = virtualRegs.size();
for (int i = 0; i < size; ++i) {
@@ -965,7 +965,7 @@ Device::transmit()
txFifo.pop();
#if TRACING_ON
if (DTRACE(Ethernet)) {
if (Debug::Ethernet) {
IpPtr ip(packet);
if (ip) {
DPRINTF(Ethernet, "ID is %d\n", ip->id());

2
src/dev/serial/terminal.cc
View File

@@ -324,7 +324,7 @@ void
Terminal::writeData(uint8_t c)
{
#if TRACING_ON == 1
if (DTRACE(Terminal)) {
if (Debug::Terminal) {
static char last = '\0';
if ((c != '\n' && c != '\r') || (last != '\n' && last != '\r')) {

6
src/dev/virtio/base.cc
View File

@@ -105,7 +105,7 @@ VirtDescriptor::updateChain()
void
VirtDescriptor::dump() const
{
if (!DTRACE(VIO))
if (!Debug::VIO)
return;
DPRINTF(VIO, "Descriptor[%i]: "
@@ -122,7 +122,7 @@ VirtDescriptor::dump() const
void
VirtDescriptor::dumpChain() const
{
if (!DTRACE(VIO))
if (!Debug::VIO)
return;
const VirtDescriptor *desc(this);
@@ -314,7 +314,7 @@ VirtQueue::produceDescriptor(VirtDescriptor *desc, uint32_t len)
void
VirtQueue::dump() const
{
if (!DTRACE(VIO))
if (!Debug::VIO)
return;
for (const VirtDescriptor &d : descriptors)

4
src/dev/virtio/fs9p.cc
View File

@@ -194,7 +194,7 @@ void
VirtIO9PBase::dumpMsg(const P9MsgHeader &header, const uint8_t *data, size_t size)
{
#ifndef NDEBUG
if (!DTRACE(VIO9P))
if (!Debug::VIO9P)
return;
const P9MsgInfoMap::const_iterator it_msg(p9_msg_info.find(header.type));
@@ -386,7 +386,7 @@ VirtIO9PDiod::startDiod()
// Start diod
execlp(p.diod.c_str(), p.diod.c_str(),
"-d", DTRACE(VIO9P) ? "1" : "0", // show debug output
"-d", Debug::VIO9P ? "1" : "0", // show debug output
"-f", // start in foreground
"-r", diod_rfd_s.c_str(), // setup read FD
"-w", diod_wfd_s.c_str(), // setup write FD

2
src/kern/linux/events.hh
View File

@@ -64,7 +64,7 @@ class DebugPrintk : public Base
void
process(ThreadContext *tc) override
{
if (DTRACE(DebugPrintf)) {
if (Debug::DebugPrintf) {
std::string str;
std::function<int(ThreadContext *, Addr, PrintkVarArgs)> func =
[&str](ThreadContext *tc, Addr format_ptr,

2
src/mem/external_slave.cc
View File

@@ -96,7 +96,7 @@ class StubSlavePortHandler : public
Tick
StubSlavePort::recvAtomic(PacketPtr packet)
{
if (DTRACE(ExternalPort)) {
if (Debug::ExternalPort) {
M5_VAR_USED unsigned int size = packet->getSize();
DPRINTF(ExternalPort, "StubSlavePort: recvAtomic a: 0x%x size: %d"

2
src/mem/qos/mem_sink.cc
View File

@@ -222,7 +222,7 @@ MemSinkCtrl::processNextReqEvent()
"%s DUMPING %s queues status\n", __func__,
(busState == WRITE ? "WRITE" : "READ"));
if (DTRACE(QOS)) {
if (Debug::QOS) {
for (uint8_t i = 0; i < numPriorities(); ++i) {
std::string plist = "";
for (auto& e : (busState == WRITE ? writeQueue[i]: readQueue[i])) {

2
src/sim/drain.cc
View File

@@ -70,7 +70,7 @@ DrainManager::tryDrain()
_state = DrainState::Draining;
for (auto *obj : _allDrainable) {
DrainState status = obj->dmDrain();
if (DTRACE(Drain) && status != DrainState::Drained) {
if (Debug::Drain && status != DrainState::Drained) {
SimObject *temp = dynamic_cast<SimObject*>(obj);
if (temp)
DPRINTF(Drain, "Failed to drain %s\n", temp->name());

2
src/sim/eventq.cc
View File

@@ -216,7 +216,7 @@ EventQueue::serviceOne()
if (!event->squashed()) {
// forward current cycle to the time when this event occurs.
setCurTick(event->when());
if (DTRACE(Event))
if (Debug::Event)
event->trace("executed");
event->process();
if (event->isExitEvent()) {

6
src/sim/eventq.hh
View File

@@ -781,7 +781,7 @@ class EventQueue
event->flags.set(Event::Scheduled);
event->acquire();
if (DTRACE(Event))
if (Debug::Event)
event->trace("scheduled");
}
@@ -802,7 +802,7 @@ class EventQueue
event->flags.clear(Event::Squashed);
event->flags.clear(Event::Scheduled);
if (DTRACE(Event))
if (Debug::Event)
event->trace("descheduled");
event->release();
@@ -833,7 +833,7 @@ class EventQueue
event->flags.clear(Event::Squashed);
event->flags.set(Event::Scheduled);
if (DTRACE(Event))
if (Debug::Event)
event->trace("rescheduled");
}