misc: Use PARAMS

The patch is using the newly defined PARAMS macro to replace
custom params() getters in derived class.

The patch is also removing redundant _params:
Instead of creating yet another _params field, SimObject descendants
should use params() to expose the real type of SimObject::_params they
already have.

Change-Id: I43394cebb9661fe747bdbb332236f0f0181b3dba
Signed-off-by: Alexander Klimov <Alexander.Klimov@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39900
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Alexander Klimov
2021-01-26 08:21:53 +00:00
committed by Giacomo Travaglini
parent c8a2114df2
commit 92ba3ba843
120 changed files with 152 additions and 700 deletions

View File

@@ -101,7 +101,7 @@ CortexA76::getPort(const std::string &if_name, PortID idx)
}
CortexA76Cluster::CortexA76Cluster(const Params &p) :
SimObject(p), _params(p), cores(p.cores), evs(p.evs)
SimObject(p), cores(p.cores), evs(p.evs)
{
for (int i = 0; i < p.cores.size(); i++)
p.cores[i]->setCluster(this, i);

View File

@@ -52,18 +52,15 @@ class CortexA76Cluster;
class CortexA76 : public Iris::CPU<CortexA76TC>
{
protected:
typedef FastModelCortexA76Params Params;
typedef Iris::CPU<CortexA76TC> Base;
const Params &_params;
CortexA76Cluster *cluster = nullptr;
int num = 0;
const Params &params() { return _params; }
public:
PARAMS(FastModelCortexA76);
CortexA76(const Params &p) :
Base(p, scx::scx_get_iris_connection_interface()), _params(p)
Base(p, scx::scx_get_iris_connection_interface())
{}
void initState() override;
@@ -80,13 +77,11 @@ class CortexA76 : public Iris::CPU<CortexA76TC>
class CortexA76Cluster : public SimObject
{
private:
typedef FastModelCortexA76ClusterParams Params;
const Params &_params;
std::vector<CortexA76 *> cores;
sc_core::sc_module *evs;
public:
PARAMS(FastModelCortexA76Cluster);
template <class T>
void
set_evs_param(const std::string &n, T val)
@@ -98,7 +93,6 @@ class CortexA76Cluster : public SimObject
sc_core::sc_module *getEvs() const { return evs; }
CortexA76Cluster(const Params &p);
const Params &params() { return _params; }
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;

View File

@@ -94,7 +94,7 @@ CortexR52::getPort(const std::string &if_name, PortID idx)
}
CortexR52Cluster::CortexR52Cluster(const Params &p) :
SimObject(p), _params(p), cores(p.cores), evs(p.evs)
SimObject(p), cores(p.cores), evs(p.evs)
{
for (int i = 0; i < p.cores.size(); i++)
p.cores[i]->setCluster(this, i);

View File

@@ -52,18 +52,15 @@ class CortexR52Cluster;
class CortexR52 : public Iris::CPU<CortexR52TC>
{
protected:
typedef FastModelCortexR52Params Params;
typedef Iris::CPU<CortexR52TC> Base;
const Params &_params;
CortexR52Cluster *cluster = nullptr;
int num = 0;
const Params &params() { return _params; }
public:
PARAMS(FastModelCortexR52);
CortexR52(const Params &p) :
Base(p, scx::scx_get_iris_connection_interface()), _params(p)
Base(p, scx::scx_get_iris_connection_interface())
{}
template <class T>
@@ -78,9 +75,6 @@ class CortexR52 : public Iris::CPU<CortexR52TC>
class CortexR52Cluster : public SimObject
{
private:
typedef FastModelCortexR52ClusterParams Params;
const Params &_params;
std::vector<CortexR52 *> cores;
sc_core::sc_module *evs;
@@ -95,8 +89,8 @@ class CortexR52Cluster : public SimObject
CortexR52 *getCore(int num) const { return cores.at(num); }
sc_core::sc_module *getEvs() const { return evs; }
PARAMS(FastModelCortexR52Cluster);
CortexR52Cluster(const Params &p);
const Params &params() { return _params; }
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;

View File

@@ -69,7 +69,7 @@ SCGIC::Terminator::sendTowardsCPU(uint8_t len, const uint8_t *data)
SCGIC::SCGIC(const SCFastModelGICParams &params,
sc_core::sc_module_name _name)
: scx_evs_GIC(_name), _params(params)
: scx_evs_GIC(_name)
{
signalInterrupt.bind(signal_interrupt);

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@@ -80,7 +80,6 @@ class SCGIC : public scx_evs_GIC
};
std::unique_ptr<Terminator> terminator;
const SCFastModelGICParams &_params;
public:
SCGIC(const SCFastModelGICParams &p) : SCGIC(p, p.name.c_str()) {}
@@ -97,11 +96,7 @@ class SCGIC : public scx_evs_GIC
scx_evs_GIC::start_of_simulation();
}
void start_of_simulation() override {}
const SCFastModelGICParams &
params()
{
return _params;
}
PARAMS(SCFastModelGIC);
};
// This class pairs with the one above to implement the receiving end of gem5's

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@@ -38,13 +38,7 @@ namespace Iris
class Interrupts : public BaseInterrupts
{
public:
typedef IrisInterruptsParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(IrisInterrupts);
Interrupts(const Params &p) : BaseInterrupts(p) {}

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@@ -46,12 +46,7 @@ class FsFreebsd : public ArmISA::FsWorkload
{
public:
/** Boilerplate params code */
typedef ArmFsFreebsdParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(ArmFsFreebsd);
/** When enabled, dump stats/task info on context switches for
* Streamline and per-thread cache occupancy studies, etc. */

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@@ -46,15 +46,9 @@ namespace ArmISA
class EmuFreebsd : public SEWorkload
{
public:
using Params = ArmEmuFreebsdParams;
PARAMS(ArmEmuFreebsd);
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
EmuFreebsd(const Params &p) : SEWorkload(p), _params(p) {}
EmuFreebsd(const Params &p) : SEWorkload(p) {}
struct BaseSyscallABI {};
struct SyscallABI32 : public SEWorkload::SyscallABI32,

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@@ -117,12 +117,7 @@ class FsWorkload : public KernelWorkload
}
public:
typedef ArmFsWorkloadParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(ArmFsWorkload);
Addr
getEntry() const override

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@@ -74,13 +74,7 @@ class Interrupts : public BaseInterrupts
public:
typedef ArmInterruptsParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(ArmInterrupts);
Interrupts(const Params &p) : BaseInterrupts(p)
{

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@@ -122,12 +122,6 @@ ISA::ISA(const Params &p) : BaseISA(p), system(NULL),
std::vector<struct ISA::MiscRegLUTEntry> ISA::lookUpMiscReg(NUM_MISCREGS);
const ArmISAParams &
ISA::params() const
{
return dynamic_cast<const Params &>(_params);
}
void
ISA::clear()
{

View File

@@ -882,9 +882,7 @@ namespace ArmISA
return _vecRegRenameMode;
}
typedef ArmISAParams Params;
const Params &params() const;
PARAMS(ArmISA);
ISA(const Params &p);

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@@ -84,12 +84,7 @@ class FsLinux : public ArmISA::FsWorkload
public:
/** Boilerplate params code */
typedef ArmFsLinuxParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(ArmFsLinux);
/** When enabled, dump stats/task info on context switches for
* Streamline and per-thread cache occupancy studies, etc. */

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@@ -40,15 +40,8 @@ namespace ArmISA
class EmuLinux : public SEWorkload
{
public:
using Params = ArmEmuLinuxParams;
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
PARAMS(ArmEmuLinux);
EmuLinux(const Params &p) : SEWorkload(p) {}
struct BaseSyscallABI {};
struct SyscallABI32 : public SEWorkload::SyscallABI32,

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@@ -96,13 +96,7 @@ class ArmNativeTrace : public NativeTrace
bool stopOnPCError;
public:
typedef ArmNativeTraceParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(ArmNativeTrace);
ArmNativeTrace(const Params &p) :
NativeTrace(p), stopOnPCError(p.stop_on_pc_error)

View File

@@ -38,15 +38,8 @@ namespace ArmISA
class SEWorkload : public ::SEWorkload
{
public:
using Params = ArmSEWorkloadParams;
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
PARAMS(ArmSEWorkload);
SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Arm64; }

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@@ -148,12 +148,7 @@ class ArmSystem : public System
static constexpr Addr PageBytes = ArmISA::PageBytes;
static constexpr Addr PageShift = ArmISA::PageShift;
typedef ArmSystemParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(ArmSystem);
ArmSystem(const Params &p);

View File

@@ -913,16 +913,10 @@ class TableWalker : public ClockedObject
static const unsigned COMPLETED = 1;
public:
typedef ArmTableWalkerParams Params;
PARAMS(ArmTableWalker);
TableWalker(const Params &p);
virtual ~TableWalker();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
void init() override;
bool haveLPAE() const { return _haveLPAE; }

View File

@@ -204,7 +204,8 @@ class TLB : public BaseTLB
int rangeMRU; //On lookup, only move entries ahead when outside rangeMRU
public:
TLB(const ArmTLBParams &p);
PARAMS(ArmTLB);
TLB(const Params &p);
TLB(const Params &p, int _size, TableWalker *_walker);
/** Lookup an entry in the TLB
@@ -439,11 +440,6 @@ protected:
ArmTranslationType tranType = NormalTran);
public:
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
void invalidateMiscReg() { miscRegValid = false; }
private:

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@@ -41,18 +41,12 @@ class BaseInterrupts : public SimObject
ThreadContext *tc = nullptr;
public:
typedef BaseInterruptsParams Params;
PARAMS(BaseInterrupts);
BaseInterrupts(const Params &p) : SimObject(p) {}
virtual void setThreadContext(ThreadContext *_tc) { tc = _tc; }
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
/*
* Functions for retrieving interrupts for the CPU to handle.
*/

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@@ -47,13 +47,7 @@ namespace MipsISA
class Interrupts : public BaseInterrupts
{
public:
typedef MipsInterruptsParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(MipsInterrupts);
Interrupts(const Params &p) : BaseInterrupts(p) {}

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@@ -140,12 +140,6 @@ ISA::ISA(const Params &p) : BaseISA(p), numThreads(p.num_threads),
clear();
}
const MipsISAParams &
ISA::params() const
{
return dynamic_cast<const Params &>(_params);
}
void
ISA::clear()
{

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@@ -54,7 +54,7 @@ namespace MipsISA
// The MIPS name for this file is CP0 or Coprocessor 0
typedef ISA CP0;
typedef MipsISAParams Params;
PARAMS(MipsISA);
protected:
// Number of threads and vpes an individual ISA state can handle
@@ -128,8 +128,6 @@ namespace MipsISA
static std::string miscRegNames[NumMiscRegs];
public:
const Params &params() const;
ISA(const Params &p);
RegId flattenRegId(const RegId& regId) const { return regId; }

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@@ -39,19 +39,14 @@ namespace MipsISA
class EmuLinux : public SEWorkload
{
public:
using Params = MipsEmuLinuxParams;
protected:
const Params &_params;
/// Syscall descriptors, indexed by call number.
static SyscallDescTable<SyscallABI> syscallDescs;
public:
const Params &params() const { return _params; }
PARAMS(MipsEmuLinux);
EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
EmuLinux(const Params &p) : SEWorkload(p) {}
void syscall(ThreadContext *tc) override;
};

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@@ -40,15 +40,9 @@ namespace MipsISA
class SEWorkload : public ::SEWorkload
{
public:
using Params = MipsSEWorkloadParams;
PARAMS(MipsSEWorkload);
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Mips; }

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@@ -41,13 +41,7 @@ namespace PowerISA {
class Interrupts : public BaseInterrupts
{
public:
typedef PowerInterruptsParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(PowerInterrupts);
Interrupts(const Params &p) : BaseInterrupts(p) {}

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@@ -47,10 +47,4 @@ ISA::ISA(const Params &p) : BaseISA(p)
clear();
}
const PowerISAParams &
ISA::params() const
{
return dynamic_cast<const Params &>(_params);
}
}

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@@ -52,7 +52,7 @@ class ISA : public BaseISA
RegVal miscRegs[NumMiscRegs];
public:
typedef PowerISAParams Params;
PARAMS(PowerISA);
void clear() {}
@@ -128,8 +128,6 @@ class ISA : public BaseISA
return reg;
}
const Params &params() const;
ISA(const Params &p);
};

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@@ -40,19 +40,14 @@ namespace PowerISA
class EmuLinux : public SEWorkload
{
public:
using Params = PowerEmuLinuxParams;
protected:
const Params &_params;
/// Syscall descriptors, indexed by call number.
static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs;
public:
const Params &params() const { return _params; }
PARAMS(PowerEmuLinux);
EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
EmuLinux(const Params &p) : SEWorkload(p) {}
void syscall(ThreadContext *tc) override;
};

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@@ -40,15 +40,8 @@ namespace PowerISA
class SEWorkload : public ::SEWorkload
{
public:
using Params = PowerSEWorkloadParams;
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
PARAMS(PowerSEWorkload);
SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Power; }

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@@ -57,13 +57,7 @@ class Interrupts : public BaseInterrupts
std::bitset<NumInterruptTypes> ie;
public:
typedef RiscvInterruptsParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(RiscvInterrupts);
Interrupts(const Params &p) : BaseInterrupts(p), ip(0), ie(0) {}

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@@ -182,12 +182,6 @@ ISA::ISA(const Params &p) : BaseISA(p)
clear();
}
const RiscvISAParams &
ISA::params() const
{
return dynamic_cast<const Params &>(_params);
}
void ISA::clear()
{
std::fill(miscRegFile.begin(), miscRegFile.end(), 0);

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@@ -76,7 +76,7 @@ class ISA : public BaseISA
bool hpmCounterEnabled(int counter) const;
public:
typedef RiscvISAParams Params;
PARAMS(RiscvISA);
void clear();
@@ -98,8 +98,6 @@ class ISA : public BaseISA
void serialize(CheckpointOut &cp) const;
void unserialize(CheckpointIn &cp);
const Params &params() const;
ISA(const Params &p);
};

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@@ -40,11 +40,7 @@ namespace RiscvISA
class EmuLinux : public SEWorkload
{
public:
using Params = RiscvEmuLinuxParams;
protected:
const Params &_params;
/// 64 bit syscall descriptors, indexed by call number.
static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs64;
@@ -53,9 +49,9 @@ class EmuLinux : public SEWorkload
static SyscallDescTable<SEWorkload::SyscallABI> syscallDescs32;
public:
const Params &params() const { return _params; }
PARAMS(RiscvEmuLinux);
EmuLinux(const Params &p) : SEWorkload(p), _params(p) {}
EmuLinux(const Params &p) : SEWorkload(p) {}
void syscall(ThreadContext *tc) override;
};

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@@ -191,13 +191,7 @@ namespace RiscvISA
tlb = _tlb;
}
typedef RiscvPagetableWalkerParams Params;
const Params &
params() const
{
return static_cast<const Params &>(_params);
}
PARAMS(RiscvPagetableWalker);
Walker(const Params &params) :
ClockedObject(params), port(name() + ".port", this),

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@@ -40,15 +40,9 @@ namespace RiscvISA
class SEWorkload : public ::SEWorkload
{
public:
using Params = RiscvSEWorkloadParams;
PARAMS(RiscvSEWorkload);
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
SEWorkload(const Params &p) : ::SEWorkload(p), _params(p) {}
SEWorkload(const Params &p) : ::SEWorkload(p) {}
::Loader::Arch getArch() const override { return ::Loader::Riscv64; }

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@@ -61,13 +61,7 @@ class Interrupts : public BaseInterrupts
public:
typedef SparcInterruptsParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(SparcInterrupts);
Interrupts(const Params &p) : BaseInterrupts(p)
{

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@@ -64,12 +64,6 @@ ISA::ISA(const Params &p) : BaseISA(p)
clear();
}
const SparcISAParams &
ISA::params() const
{
return dynamic_cast<const Params &>(_params);
}
void
ISA::reloadRegMap()
{

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@@ -221,8 +221,7 @@ class ISA : public BaseISA
return readMiscRegNoEffect(MISCREG_MMU_P_CONTEXT);
}
typedef SparcISAParams Params;
const Params &params() const;
PARAMS(SparcISA);
ISA(const Params &p);
};

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@@ -73,7 +73,7 @@ LinuxLoader loader;
namespace SparcISA
{
EmuLinux::EmuLinux(const Params &p) : SEWorkload(p), _params(p)
EmuLinux::EmuLinux(const Params &p) : SEWorkload(p)
{}
void

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@@ -39,12 +39,7 @@ namespace SparcISA
class EmuLinux : public SEWorkload
{
public:
using Params = SparcEmuLinuxParams;
protected:
const Params &_params;
/// 64 bit syscall descriptors, indexed by call number.
static SyscallDescTable<SEWorkload::SyscallABI64> syscallDescs;
@@ -55,7 +50,7 @@ class EmuLinux : public SEWorkload
void syscall32(ThreadContext *tc);
public:
const Params &params() const { return _params; }
PARAMS(SparcEmuLinux);
EmuLinux(const Params &p);

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@@ -71,7 +71,7 @@ void installSegDesc(ThreadContext *tc, SegmentRegIndex seg,
class FsWorkload : public KernelWorkload
{
public:
typedef X86FsWorkloadParams Params;
PARAMS(X86FsWorkload);
FsWorkload(const Params &p);
public:
@@ -89,8 +89,6 @@ class FsWorkload : public KernelWorkload
void writeOutMPTable(Addr fp,
Addr &fpSize, Addr &tableSize, Addr table=0);
const Params &params() const { return (const Params &)_params; }
};
} // namespace X86ISA

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@@ -190,16 +190,10 @@ class Interrupts : public BaseInterrupts
/*
* Params stuff.
*/
typedef X86LocalApicParams Params;
PARAMS(X86LocalApic);
void setThreadContext(ThreadContext *_tc) override;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
/*
* Initialize this object by registering it with the IO APIC.
*/

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@@ -137,12 +137,6 @@ ISA::ISA(const X86ISAParams &p) : BaseISA(p), vendorString(p.vendor_string)
clear();
}
const X86ISAParams &
ISA::params() const
{
return dynamic_cast<const Params &>(_params);
}
RegVal
ISA::readMiscRegNoEffect(int miscReg) const
{

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@@ -57,10 +57,9 @@ namespace X86ISA
public:
void clear();
typedef X86ISAParams Params;
PARAMS(X86ISA);
ISA(const Params &p);
const Params &params() const;
RegVal readMiscRegNoEffect(int miscReg) const;
RegVal readMiscReg(int miscReg);

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@@ -89,7 +89,7 @@ LinuxLoader loader;
namespace X86ISA
{
EmuLinux::EmuLinux(const Params &p) : SEWorkload(p), _params(p)
EmuLinux::EmuLinux(const Params &p) : SEWorkload(p)
{}
const std::vector<IntRegIndex> EmuLinux::SyscallABI64::ArgumentRegs = {

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@@ -52,13 +52,7 @@ namespace X86ISA
class EmuLinux : public SEWorkload
{
public:
using Params = X86EmuLinuxParams;
protected:
const Params &_params;
public:
const Params &params() const { return _params; }
PARAMS(X86EmuLinux);
EmuLinux(const Params &p);

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@@ -193,13 +193,7 @@ namespace X86ISA
tlb = _tlb;
}
typedef X86PagetableWalkerParams Params;
const Params &
params() const
{
return static_cast<const Params &>(_params);
}
PARAMS(X86PagetableWalker);
Walker(const Params &params) :
ClockedObject(params), port(name() + ".port", this),

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@@ -309,12 +309,7 @@ class BaseCPU : public ClockedObject
{ return static_cast<ThreadID>(cid - threadContexts[0]->contextId()); }
public:
typedef BaseCPUParams Params;
const Params &
params() const
{
return reinterpret_cast<const Params &>(_params);
}
PARAMS(BaseCPU);
BaseCPU(const Params &params, bool is_checker = false);
virtual ~BaseCPU();

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@@ -90,7 +90,7 @@ CheckerCPU::~CheckerCPU()
void
CheckerCPU::setSystem(System *system)
{
const Params &p = dynamic_cast<const Params &>(_params);
const Params &p = params();
systemPtr = system;

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@@ -91,7 +91,7 @@ class CheckerCPU : public BaseCPU, public ExecContext
public:
void init() override;
typedef CheckerCPUParams Params;
PARAMS(CheckerCPU);
CheckerCPU(const Params &p);
virtual ~CheckerCPU();

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@@ -55,12 +55,7 @@
class AmbaFake : public AmbaPioDevice
{
public:
typedef AmbaFakeParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(AmbaFake);
AmbaFake(const Params &p);
virtual Tick read(PacketPtr pkt);

View File

@@ -109,8 +109,7 @@ ArmPPIGen::get(ThreadContext* tc)
return pin_it->second;
} else {
// Generate PPI Pin
auto &p = static_cast<const ArmPPIParams &>(_params);
ArmPPI *pin = new ArmPPI(p, tc);
ArmPPI *pin = new ArmPPI(ArmPPIGen::params(), tc);
pins.insert({cid, pin});

View File

@@ -165,7 +165,8 @@ class ArmSPIGen : public ArmInterruptPinGen
class ArmPPIGen : public ArmInterruptPinGen
{
public:
ArmPPIGen(const ArmPPIParams &p);
PARAMS(ArmPPI);
ArmPPIGen(const Params &p);
ArmInterruptPin* get(ThreadContext* tc = nullptr) override;
protected:

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@@ -263,15 +263,10 @@ class Platform : public Scp
public:
using ProtocolList = std::unordered_map<uint8_t, Protocol *>;
Platform(const ScmiPlatformParams &p);
PARAMS(ScmiPlatform);
Platform(const Params &p);
~Platform();
const ScmiPlatformParams&
params() const
{
return static_cast<const ScmiPlatformParams&>(_params);
}
void handleMessage(AgentChannel *ch, Message &msg);
/** Returns the number of agents in the system */

View File

@@ -408,12 +408,6 @@ GenericTimer::GenericTimer(const GenericTimerParams &p)
system.setGenericTimer(this);
}
const GenericTimerParams &
GenericTimer::params() const
{
return dynamic_cast<const GenericTimerParams &>(_params);
}
void
GenericTimer::serialize(CheckpointOut &cp) const
{
@@ -469,7 +463,7 @@ void
GenericTimer::createTimers(unsigned cpus)
{
assert(timers.size() < cpus);
auto &p = static_cast<const GenericTimerParams &>(_params);
auto &p = params();
const unsigned old_cpu_count(timers.size());
timers.resize(cpus);

View File

@@ -286,9 +286,9 @@ class ArchTimerKvm : public ArchTimer
class GenericTimer : public SimObject
{
public:
const GenericTimerParams &params() const;
PARAMS(GenericTimer);
GenericTimer(const GenericTimerParams &p);
GenericTimer(const Params &p);
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;

View File

@@ -475,12 +475,7 @@ class GicV2 : public BaseGic, public BaseGicRegisters
int pendingDelayedInterrupts;
public:
typedef GicV2Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(GicV2);
GicV2(const Params &p);
~GicV2();

View File

@@ -56,7 +56,6 @@ class Gicv3 : public BaseGic
friend class Gicv3CPUInterface;
friend class Gicv3Redistributor;
typedef Gicv3Params Params;
Gicv3Distributor * distributor;
std::vector<Gicv3Redistributor *> redistributors;
std::vector<Gicv3CPUInterface *> cpuInterfaces;
@@ -111,11 +110,7 @@ class Gicv3 : public BaseGic
void init() override;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(Gicv3);
Tick read(PacketPtr pkt) override;
void reset();

View File

@@ -356,13 +356,7 @@ class Pl111: public AmbaDmaDevice
bool enableCapture;
public:
typedef Pl111Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(Pl111);
Pl111(const Params &p);
~Pl111();

View File

@@ -63,11 +63,7 @@ class RealView : public Platform
BaseGic *gic;
public:
typedef RealViewParams Params;
const Params &
params() const {
return dynamic_cast<const Params &>(_params);
}
PARAMS(RealView);
/**
* Constructor for the Tsunami Class.

View File

@@ -97,12 +97,8 @@ class PL031 : public AmbaIntDevice
void resyncMatch();
public:
typedef PL031Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(PL031);
/**
* The constructor for RealView just registers itself with the MMU.
* @param p params structure
@@ -129,4 +125,3 @@ class PL031 : public AmbaIntDevice
#endif // __DEV_ARM_RTC_PL031_HH__

View File

@@ -153,12 +153,8 @@ class RealViewCtrl : public BasicPioDevice
uint32_t scData;
public:
typedef RealViewCtrlParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(RealViewCtrl);
/**
* The constructor for RealView just registers itself with the MMU.
* @param p params structure

View File

@@ -118,7 +118,8 @@ class SMMUv3DeviceInterface : public ClockedObject
Port& getPort(const std::string &name, PortID id) override;
public:
SMMUv3DeviceInterface(const SMMUv3DeviceInterfaceParams &p);
PARAMS(SMMUv3DeviceInterface);
SMMUv3DeviceInterface(const Params &p);
~SMMUv3DeviceInterface()
{
@@ -126,12 +127,6 @@ class SMMUv3DeviceInterface : public ClockedObject
delete mainTLB;
}
const SMMUv3DeviceInterfaceParams &
params() const
{
return static_cast<const SMMUv3DeviceInterfaceParams &>(_params);
}
DrainState drain() override;
void setSMMU(SMMUv3 *_smmu) { smmu = _smmu; }

View File

@@ -149,12 +149,8 @@ class A9GlobalTimer : public BasicPioDevice
Timer global_timer;
public:
typedef A9GlobalTimerParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(A9GlobalTimer);
/**
* The constructor for RealView just registers itself with the MMU.
* @param p params structure

View File

@@ -162,12 +162,8 @@ class CpuLocalTimer : public BasicPioDevice
std::vector<std::unique_ptr<Timer>> localTimer;
public:
typedef CpuLocalTimerParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(CpuLocalTimer);
/**
* The constructor for RealView just registers itself with the MMU.
* @param p params structure

View File

@@ -135,12 +135,8 @@ class Sp804 : public AmbaPioDevice
Timer timer1;
public:
typedef Sp804Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(Sp804);
/**
* The constructor for RealView just registers itself with the MMU.
* @param p params structure

View File

@@ -186,12 +186,7 @@ class VGic : public PioDevice
struct std::array<vcpuIntData, VGIC_CPU_MAX> vcpuData;
public:
typedef VGicParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(VGic);
VGic(const Params &p);
~VGic();

View File

@@ -49,21 +49,13 @@ class BadDevice : public BasicPioDevice
std::string devname;
public:
typedef BadDeviceParams Params;
PARAMS(BadDevice);
protected:
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
public:
/**
* Constructor for the Baddev Class.
* @param p object parameters
* @param a base address of the write
*/
/**
* Constructor for the Baddev Class.
* @param p object parameters
* @param a base address of the write
*/
BadDevice(const Params &p);
virtual Tick read(PacketPtr pkt);

View File

@@ -128,16 +128,10 @@ class PioDevice : public ClockedObject
virtual Tick write(PacketPtr pkt) = 0;
public:
typedef PioDeviceParams Params;
PARAMS(PioDevice);
PioDevice(const Params &p);
virtual ~PioDevice();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
void init() override;
Port &getPort(const std::string &if_name,
@@ -160,15 +154,9 @@ class BasicPioDevice : public PioDevice
Tick pioDelay;
public:
typedef BasicPioDeviceParams Params;
PARAMS(BasicPioDevice);
BasicPioDevice(const Params &p, Addr size);
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
/**
* Determine the address ranges that this device responds to.
*

View File

@@ -55,12 +55,8 @@ class IsaFake : public BasicPioDevice
uint64_t retData64;
public:
typedef IsaFakeParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(IsaFake);
/**
* The constructor for Isa Fake just registers itself with the MMU.
* @param p params structure

View File

@@ -76,13 +76,7 @@ class MaltaCChip : public BasicPioDevice
//uint64_t itint;
public:
typedef MaltaCChipParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(MaltaCChip);
/**
* Initialize the Malta CChip by setting all of the

View File

@@ -102,13 +102,7 @@ class MaltaIO : public BasicPioDevice
*/
Tick frequency() const;
typedef MaltaIOParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(MaltaIO);
/**
* Initialize all the data for devices supported by Malta I/O.

View File

@@ -215,16 +215,10 @@ class DistEtherLink : public SimObject
Tick linkDelay;
public:
typedef DistEtherLinkParams Params;
PARAMS(DistEtherLink);
DistEtherLink(const Params &p);
~DistEtherLink();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;

View File

@@ -55,16 +55,10 @@ class EtherBus : public SimObject
EtherDump *dump;
public:
typedef EtherBusParams Params;
PARAMS(EtherBus);
EtherBus(const Params &p);
virtual ~EtherBus() {}
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
void txDone();
void reg(EtherInt *dev);
bool busy() const { return (bool)packet; }

View File

@@ -45,18 +45,12 @@ class EtherInt;
class EtherDevice : public PciDevice
{
public:
typedef EtherDeviceParams Params;
PARAMS(EtherDevice);
EtherDevice(const Params &params)
: PciDevice(params),
etherDeviceStats(this)
{}
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
protected:
struct EtherDeviceStats : public Stats::Group
{
@@ -146,16 +140,10 @@ class EtherDevice : public PciDevice
class EtherDevBase : public EtherDevice
{
public:
EtherDevBase(const EtherDevBaseParams &params)
PARAMS(EtherDevBase);
EtherDevBase(const Params &params)
: EtherDevice(params)
{}
const EtherDevBaseParams &
params() const
{
return dynamic_cast<const EtherDevBaseParams &>(_params);
}
};
#endif // __DEV_NET_ETHERDEVICE_HH__

View File

@@ -140,16 +140,10 @@ class EtherLink : public SimObject
Interface *interface[2];
public:
typedef EtherLinkParams Params;
PARAMS(EtherLink);
EtherLink(const Params &p);
virtual ~EtherLink();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;

View File

@@ -51,17 +51,11 @@
class EtherSwitch : public SimObject
{
public:
typedef EtherSwitchParams Params;
PARAMS(EtherSwitch);
EtherSwitch(const Params &p);
~EtherSwitch();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
Port &getPort(const std::string &if_name,
PortID idx=InvalidPortID) override;

View File

@@ -56,16 +56,10 @@ class EtherTapInt;
class EtherTapBase : public SimObject
{
public:
typedef EtherTapBaseParams Params;
PARAMS(EtherTapBase);
EtherTapBase(const Params &p);
virtual ~EtherTapBase();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
@@ -136,16 +130,10 @@ class TapListener;
class EtherTapStub : public EtherTapBase
{
public:
typedef EtherTapStubParams Params;
PARAMS(EtherTapStub);
EtherTapStub(const Params &p);
~EtherTapStub();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
void serialize(CheckpointOut &cp) const override;
void unserialize(CheckpointIn &cp) override;
@@ -171,16 +159,10 @@ class EtherTapStub : public EtherTapBase
class EtherTap : public EtherTapBase
{
public:
typedef EtherTapParams Params;
PARAMS(EtherTap);
EtherTap(const Params &p);
~EtherTap();
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
protected:
int tap;

View File

@@ -473,12 +473,7 @@ class IGbE : public EtherDevice
TxDescCache txDescCache;
public:
typedef IGbEParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(IGbE);
IGbE(const Params &params);
~IGbE();

View File

@@ -326,12 +326,7 @@ class NSGigE : public EtherDevBase
NSGigEInt *interface;
public:
typedef NSGigEParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(NSGigE);
NSGigE(const Params &params);
~NSGigE();

View File

@@ -76,8 +76,7 @@ class Base : public EtherDevBase
* Construction/Destruction/Parameters
*/
public:
typedef SinicParams Params;
const Params &params() const { return (const Params &)_params; }
PARAMS(Sinic);
Base(const Params &p);
};

View File

@@ -154,12 +154,7 @@ class CopyEngine : public PciDevice
std::vector<CopyEngineChannel*> chan;
public:
typedef CopyEngineParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(CopyEngine);
CopyEngine(const Params &params);
~CopyEngine();

View File

@@ -51,15 +51,9 @@ class Uart : public BasicPioDevice
SerialDevice *device;
public:
typedef UartParams Params;
PARAMS(Uart);
Uart(const Params &p, Addr pio_size);
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
/**
* Inform the uart that there is data available.
*/

View File

@@ -209,12 +209,7 @@ class Uart8250 : public Uart
EventFunctionWrapper rxIntrEvent;
public:
typedef Uart8250Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(Uart8250);
Uart8250(const Params &p);
Tick read(PacketPtr pkt) override;

View File

@@ -49,15 +49,9 @@ class DumbTOD : public BasicPioDevice
uint64_t todTime;
public:
typedef DumbTODParams Params;
PARAMS(DumbTOD);
DumbTOD(const Params &p);
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
Tick read(PacketPtr pkt) override;
Tick write(PacketPtr pkt) override;

View File

@@ -121,15 +121,9 @@ class Iob : public PioDevice
void readJBus(PacketPtr pkt);
public:
typedef IobParams Params;
PARAMS(Iob);
Iob(const Params &p);
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
Tick read(PacketPtr pkt) override;
Tick write(PacketPtr pkt) override;
void generateIpi(Type type, int cpu_id, int vector);

View File

@@ -47,15 +47,9 @@ class MmDisk : public BasicPioDevice
uint8_t diskData[SectorSize];
public:
typedef MmDiskParams Params;
PARAMS(MmDisk);
MmDisk(const Params &p);
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
Tick read(PacketPtr pkt) override;
Tick write(PacketPtr pkt) override;

View File

@@ -164,8 +164,7 @@ class IdeController : public PciDevice
void dispatchAccess(PacketPtr pkt, bool read);
public:
typedef IdeControllerParams Params;
const Params &params() const { return (const Params &)_params; }
PARAMS(IdeController);
IdeController(const Params &p);
/** See if a disk is selected based on its pointer */

View File

@@ -117,13 +117,7 @@ class I8042 : public BasicPioDevice
uint8_t readDataOut();
public:
typedef I8042Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(I8042);
I8042(const Params &p);

View File

@@ -85,13 +85,7 @@ class I82094AA : public BasicPioDevice
IntRequestPort<I82094AA> intRequestPort;
public:
typedef I82094AAParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(I82094AA);
I82094AA(const Params &p);

View File

@@ -92,13 +92,7 @@ class I8237 : public BasicPioDevice
void setMaskBit(Register &reg, const uint8_t &command);
public:
typedef I8237Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(I8237);
I8237(const Params &p);

View File

@@ -66,7 +66,7 @@ class I8254 : public BasicPioDevice
void counterInterrupt(unsigned int num);
public:
typedef I8254Params Params;
PARAMS(I8254);
Port &
getPort(const std::string &if_name, PortID idx=InvalidPortID) override
@@ -77,12 +77,6 @@ class I8254 : public BasicPioDevice
return BasicPioDevice::getPort(if_name, idx);
}
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
I8254(const Params &p) : BasicPioDevice(p, 4), latency(p.pio_latency),
pit(p.name, this)
{

View File

@@ -81,13 +81,7 @@ class I8259 : public BasicPioDevice
void handleEOI(int line);
public:
typedef I8259Params Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(I8259);
I8259(const Params &p);

View File

@@ -55,14 +55,8 @@ class SouthBridge : public SimObject
X86ISA::I82094AA * ioApic;
public:
typedef SouthBridgeParams Params;
PARAMS(SouthBridge);
SouthBridge(const Params &p);
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
};
#endif //__DEV_X86_SOUTH_BRIDGE_HH__

View File

@@ -54,13 +54,7 @@ class Speaker : public BasicPioDevice
I8254 * timer;
public:
typedef PcSpeakerParams Params;
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
PARAMS(PcSpeaker);
Speaker(const Params &p) : BasicPioDevice(p, 1),
latency(p.pio_latency), controlVal(0), timer(p.i8254)

View File

@@ -259,7 +259,7 @@ class LdsState: public ClockedObject
unsigned *numBankAccesses);
public:
typedef LdsStateParams Params;
PARAMS(LdsState);
LdsState(const Params &params);
@@ -271,12 +271,6 @@ class LdsState: public ClockedObject
parent = nullptr;
}
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
bool
isRetryResp() const
{

View File

@@ -204,7 +204,7 @@ class AbstractMemory : public ClockedObject
public:
typedef AbstractMemoryParams Params;
PARAMS(AbstractMemory);
AbstractMemory(const Params &p);
virtual ~AbstractMemory() {}
@@ -266,12 +266,6 @@ class AbstractMemory : public ClockedObject
*/
void system(System *sys) { _system = sys; }
const Params &
params() const
{
return dynamic_cast<const Params &>(_params);
}
/**
* Get the address range
*

View File

@@ -63,12 +63,7 @@ class CommMonitor : public SimObject
public: // Construction & SimObject interfaces
/** Parameters of communication monitor */
typedef CommMonitorParams Params;
const Params &
params() const
{
return reinterpret_cast<const Params &>(_params);
}
PARAMS(CommMonitor);
/**
* Constructor based on the Python params

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