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arch: Eliminate the getArgument function.

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This ISA switched function is no longer used. Eliminate it, and reduce
the number of functions used in the switched utility.hh header by one.

Change-Id: Ic6020c5fa6d976d9dbf1e9f517809acf9b0b7cd8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39321
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-01-17 22:51:13 -08:00
parent 6c32f9e521
commit c8a2114df2
11 changed files with 2 additions and 141 deletions
Download Patch File Download Diff File Expand all files Collapse all files

58
src/arch/arm/utility.cc
View File

@@ -53,64 +53,6 @@
namespace ArmISA
{
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
{
panic_if(!FullSystem,
"getArgument() only implemented for full system mode.");
panic_if(fp, "getArgument(): Floating point arguments not implemented");
if (inAArch64(tc)) {
if (size == (uint16_t)(-1))
size = sizeof(uint64_t);
if (number < 8 /*NumArgumentRegs64*/) {
return tc->readIntReg(number);
} else {
panic("getArgument(): No support reading stack args for AArch64\n");
}
} else {
if (size == (uint16_t)(-1))
size = sizeof(uint32_t);
if (number < NumArgumentRegs) {
// If the argument is 64 bits, it must be in an even regiser
// number. Increment the number here if it isn't even.
if (size == sizeof(uint64_t)) {
if ((number % 2) != 0)
number++;
// Read the two halves of the data. Number is inc here to
// get the second half of the 64 bit reg.
uint64_t tmp;
tmp = tc->readIntReg(number++);
tmp |= tc->readIntReg(number) << 32;
return tmp;
} else {
return tc->readIntReg(number);
}
} else {
Addr sp = tc->readIntReg(StackPointerReg);
PortProxy &vp = tc->getVirtProxy();
uint64_t arg;
if (size == sizeof(uint64_t)) {
// If the argument is even it must be aligned
if ((number % 2) != 0)
number++;
arg = vp.read<uint64_t>(sp +
(number-NumArgumentRegs) * sizeof(uint32_t));
// since two 32 bit args == 1 64 bit arg, increment number
number++;
} else {
arg = vp.read<uint32_t>(sp +
(number-NumArgumentRegs) * sizeof(uint32_t));
}
return arg;
}
}
panic("getArgument() should always return\n");
}
static void
copyVecRegs(ThreadContext *src, ThreadContext *dest)
{

2
src/arch/arm/utility.hh
View File

@@ -400,8 +400,6 @@ isGenericTimerSystemAccessTrapEL3(const MiscRegIndex miscReg,
bool SPAlignmentCheckEnabled(ThreadContext* tc);
uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
inline void
advancePC(PCState &pc, const StaticInstPtr &inst)
{

6
src/arch/mips/utility.cc
View File

@@ -42,12 +42,6 @@ using namespace MipsISA;
namespace MipsISA {
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
{
panic("getArgument() not implemented\n");
}
uint64_t
fpConvert(ConvertType cvt_type, double fp_val)
{

2
src/arch/mips/utility.hh
View File

@@ -49,8 +49,6 @@ buildRetPC(const PCState &curPC, const PCState &callPC)
return ret;
}
uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
////////////////////////////////////////////////////////////////////////
//
// Floating Point Utility Functions

7
src/arch/power/utility.cc
View File

@@ -55,11 +55,4 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
dest->pcState(src->pcState());
}
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
{
panic("getArgument not implemented for POWER.\n");
return 0;
}
} // namespace PowerISA

2
src/arch/power/utility.hh
View File

@@ -58,8 +58,6 @@ advancePC(PCState &pc, const StaticInstPtr &inst)
pc.advance();
}
uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
static inline bool
inUserMode(ThreadContext *tc)
{

13
src/arch/riscv/utility.hh
View File

@@ -107,19 +107,6 @@ buildRetPC(const PCState &curPC, const PCState &callPC)
return retPC;
}
inline uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
{
panic_if(fp, "getArgument(): Floating point arguments not implemented");
panic_if(size != 8, "getArgument(): Can only handle 64-bit arguments.");
panic_if(number >= ArgumentRegs.size(),
"getArgument(): Don't know how to handle stack arguments");
// The first 8 integer arguments are passed in registers, the rest
// are passed on the stack.
return tc->readIntReg(ArgumentRegs[number]);
}
inline void
copyRegs(ThreadContext *src, ThreadContext *dest)
{

25
src/arch/sparc/utility.cc
View File

@@ -31,31 +31,8 @@
#include "arch/sparc/faults.hh"
#include "mem/port_proxy.hh"
namespace SparcISA {
// The caller uses %o0-%05 for the first 6 arguments even if their floating
// point. Double precision floating point values take two registers/args.
// Quads, structs, and unions are passed as pointers. All arguments beyond
// the sixth are passed on the stack past the 16 word window save area,
// space for the struct/union return pointer, and space reserved for the
// first 6 arguments which the caller may use but doesn't have to.
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
namespace SparcISA
{
panic_if(!FullSystem, "getArgument() only implemented for full system");
const int NumArgumentRegs = 6;
if (number < NumArgumentRegs) {
return tc->readIntReg(8 + number);
} else {
Addr sp = tc->readIntReg(StackPointerReg);
PortProxy &vp = tc->getVirtProxy();
uint64_t arg = vp.read<uint64_t>(sp + 92 +
(number-NumArgumentRegs) * sizeof(uint64_t));
return arg;
}
}
void
copyMiscRegs(ThreadContext *src, ThreadContext *dest)

2
src/arch/sparc/utility.hh
View File

@@ -50,8 +50,6 @@ buildRetPC(const PCState &curPC, const PCState &callPC)
return ret;
}
uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
static inline bool
inUserMode(ThreadContext *tc)
{

23
src/arch/x86/utility.cc
View File

@@ -46,29 +46,8 @@
#include "fputils/fp80.h"
#include "sim/full_system.hh"
namespace X86ISA {
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
namespace X86ISA
{
if (fp) {
panic("getArgument(): Floating point arguments not implemented\n");
} else if (size != 8) {
panic("getArgument(): Can only handle 64-bit arguments.\n");
}
// The first 6 integer arguments are passed in registers, the rest
// are passed on the stack.
const int int_reg_map[] = {
INTREG_RDI, INTREG_RSI, INTREG_RDX,
INTREG_RCX, INTREG_R8, INTREG_R9
};
if (number < sizeof(int_reg_map) / sizeof(*int_reg_map)) {
return tc->readIntReg(int_reg_map[number]);
} else {
panic("getArgument(): Don't know how to handle stack arguments.\n");
}
}
void
copyMiscRegs(ThreadContext *src, ThreadContext *dest)

3
src/arch/x86/utility.hh
View File

@@ -53,9 +53,6 @@ namespace X86ISA
return retPC;
}
uint64_t
getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
static inline bool
inUserMode(ThreadContext *tc)
{