-
61bc567b0e
Merge "misc: Merge branch 'release-staging-v21-0' into develop" into develop
Bobby R. Bruce
2021-03-11 04:55:39 +00:00
-
-
78b640b994
base-stats,python: Add missing "group" in
_prepare_stats
Bobby R. Bruce
2021-03-10 14:41:51 -08:00
-
49082c971f
arch,cpu: Create register class descriptors.
Gabe Black
2021-02-21 06:39:04 -08:00
-
e837fdc65c
base,misc: Collapse and eliminate the ULL and LL macros.
Gabe Black
2021-03-07 23:19:58 -08:00
-
4c375bd73d
arch-x86: Fix the "index" value for SSrcReg2.
Gabe Black
2021-03-01 15:57:25 -08:00
-
b457c07669
arch-x86: Clean up some style issues in regop.isa.
Gabe Black
2021-02-27 23:26:08 -08:00
-
48094d1abf
arch-riscv: Fixing RISC-V remote GDB MIP and MIE accesses.
Peter
2021-01-27 17:25:47 +08:00
-
8bb5d9fa11
misc: Merge branch 'release-staging-v21-0' into develop
Bobby R. Bruce
2021-03-10 13:21:05 -08:00
-
-
-
89ec39a147
python: Use Pattern from typing
Jason Lowe-Power
2021-03-09 11:12:21 -08:00
-
454ffc5eb2
arch,cpu: Stop using << and to_number for VecReg serialization.
Gabe Black
2021-02-25 05:24:56 -08:00
-
b6ae52f3ae
arch: Simplify and correct style of VecReg types.
Gabe Black
2021-02-25 04:48:05 -08:00
-
fa8a528db5
arch: Eliminate the "Lane" view of vector registers.
Gabe Black
2021-02-25 00:55:15 -08:00
-
05e580f146
cpu: Eliminate the unused "lane" interface from the ThreadContext.
Gabe Black
2021-02-25 00:50:11 -08:00
-
4315b368d3
base: Adding static constexpr keywords to log2i
Giacomo Travaglini
2021-03-08 15:07:04 +00:00
-
4dcfa34c18
arch-arm,base,dev: Eliminate the power() function from intmath.hh.
Gabe Black
2021-03-07 22:33:13 -08:00
-
85ff3c1371
base: Remove "inline" from bitfield.hh.
Gabe Black
2021-03-06 23:28:36 -08:00
-
ee1837d313
system-arm: update armv8 cpu-release-addr
Yu-hsin Wang
2021-03-08 13:33:57 +08:00
-
caaffa861c
base: Add a szext function for true sign extension.
Gabe Black
2021-03-06 23:25:15 -08:00
-
8d44189476
mem: Fix some transitive includes.
Gabe Black
2021-03-07 22:45:16 -08:00
-
173a7a322c
base: Add log2i to calculate log2 for integers
Giacomo Travaglini
2021-01-21 16:50:43 +00:00
-
3acc6af5c2
configs: NVM missing the xor_low_bit argument in create_mem_intf
Giacomo Travaglini
2021-03-05 14:00:40 +00:00
-
02ed01b4bb
base: Make the functions in intmath.hh constexpr.
Gabe Black
2021-03-05 21:41:42 -08:00
-
36b57f9b4e
arch-sparc: Fix an operator precedence bug in the iob device.
Gabe Black
2021-02-08 00:36:51 -08:00
-
99d5579656
arch-mips: Fix a bug in the MIPS yield instruction.
Gabe Black
2021-02-08 00:13:52 -08:00
-
69a66fc844
cpu: Remove "lane" accessors from the ExecContext classes.
Gabe Black
2021-02-25 00:28:54 -08:00
-
f5383a5733
gpu-compute: Fix accidental execution when stopped at barrier
Kyle Roarty
2021-02-17 16:52:40 -06:00
-
25ecaaadbe
arch-arm: Switch the AAPCS ABIs to .as<>() instead of .laneView<>().
Gabe Black
2021-02-25 01:05:47 -08:00
-
ad204d9de0
sim: Simplify some code in the guest ABI mechanism.
Gabe Black
2021-02-18 06:28:26 -08:00
-
5e307c8066
base: Add a macro to expand parameter pack expressions in order.
Gabe Black
2021-03-02 19:42:41 -08:00
-
c47920d81c
arch-arm: Fix atomics permission checks in TLB
Giacomo Travaglini
2021-03-03 11:38:06 +00:00
-
7315bf685a
cpu: Style fixes in the base and O3 dynamic inst classes.
Gabe Black
2021-02-27 02:19:17 -08:00
-
bd7403f31b
arch-arm: Consolidate defintions of vectorReg operands.
Gabe Black
2021-02-25 00:17:06 -08:00
-
ef9e672eb9
python: Add search functions to pystats groups
Jason Lowe-Power
2021-03-01 14:51:15 -08:00
-
0343b506c7
arch,arch-arm: Eliminate the "zeroing" field of vec reg elements.
Gabe Black
2021-02-24 23:41:01 -08:00
-
c165fb3bce
base: Remove DDUMPN
Daniel R. Carvalho
2021-01-17 09:07:23 -03:00
-
-
649e5cd8e0
python: Add search functions to pystats groups
Bobby R. Bruce
2021-03-01 08:33:58 -08:00
-
3a1eadc04d
configs: Ruby fixes for SimpleMemory
Tiago Mück
2020-10-08 11:00:13 -05:00
-
5b9517f196
mem-ruby: renamed prefetch stats
Tiago Mück
2020-10-01 18:18:23 -05:00
-
1a9716044a
mem-ruby: notify controller on coalescing
Tiago Mück
2020-10-01 18:07:11 -05:00
-
f7a3d8bee4
mem-ruby: fix MI_example functional read
Tiago Mück
2021-02-16 19:11:04 -06:00
-
a9e0a1ccf1
gpu-compute: Explicitly set driver to nullptr in constructor
Kyle Roarty
2021-02-26 17:11:43 -06:00
-
17d04a7b53
cpu: Adding stridedGen
Mahyar Samani
2021-02-03 08:52:33 -08:00
-
53b5ae1013
base-stats: Fixed System "work_item" stat name
Bobby R. Bruce
2021-02-24 02:39:06 -08:00
-
f769117fd1
base-stats,python: Add Units to the Python Stats
Bobby R. Bruce
2021-02-19 22:58:48 -08:00
-
dbbe59a0be
base-stats,python: Expose a stat's unit via PyBind11
Bobby R. Bruce
2021-02-19 22:45:23 -08:00
-
1a1b53b9dd
sim,base-stats: Fix leading "." bug when obtaining requestors
Bobby R. Bruce
2021-02-16 17:14:56 -08:00
-
f11617736e
base-stats,python: Add Python Stats
Bobby R. Bruce
2021-01-17 20:52:31 -08:00
-
bd6e1fc9c5
arch-riscv,misc: Add missing overrides for clang compilation
Bobby R. Bruce
2021-02-25 15:23:56 -08:00
-
e100156a51
misc: Adding 'make' to the compiler Dockerfiles
Bobby R. Bruce
2021-02-24 22:36:21 -08:00
-
9396be08da
mem-ruby: RubyRequest getter for request ptr
Tiago Mück
2021-02-22 16:24:58 -06:00
-
fcc55955e2
mem-ruby: removed Message copy constructors
Tiago Mück
2020-12-08 15:19:59 -06:00
-
8ee05ddd7c
scons: Create a small helper function for disecting a build target path.
Gabe Black
2021-02-08 03:45:57 -08:00
-
69ed25971d
scons: Eliminate CXX_V and main_dict_keys in SConstruct.
Gabe Black
2021-02-08 01:03:13 -08:00
-
dbe295ab95
scons: Remove an extraneous Exit().
Gabe Black
2021-02-08 00:51:56 -08:00
-
41ccb6099b
scons: Use SCons' built in CXXVERSION instead of detecting our own.
Gabe Black
2021-02-07 23:58:57 -08:00
-
978bd8759a
scons: Enable the clang++ and clang tools.
Gabe Black
2021-02-19 02:08:03 -08:00
-
b05731f927
arch-x86: Adds rdtscp flag to cpuid for X86KvmCPU
Kevin Loughlin
2021-02-18 14:52:23 -05:00
-
57bdbe3b7d
dev-arm: Remove the A9GlobalTimer
Giacomo Travaglini
2020-07-27 17:48:21 +01:00
-
4d0b56d679
scons: Check for "make" when using LTO with gcc.
Gabe Black
2021-02-22 18:17:09 -08:00
-
b5962abb3d
arch-riscv: FS Linux config file for RISC-V
Peter Yuen
2021-02-09 14:20:14 +07:00
-
69eb60d87e
arch-riscv: RISC-V HiFive Platform implementation
Peter
2021-02-04 13:04:37 +08:00
-
de06ab35ef
arch-riscv: PLIC Implementation
Peter
2021-02-04 13:02:19 +08:00
-
4cca1d89e8
arch-riscv: Implementation of CLINT
Peter
2021-02-04 12:08:18 +08:00
-
061a6bd219
arch-riscv: Added PMA support for RiscvTLB
Peter
2021-02-04 11:58:33 +08:00
-
3a0c3aecaf
arch-riscv: Fixing interrupt handling order and effect of mideleg
Peter
2021-01-29 17:48:20 +08:00
-
2373934b82
misc: Updated the RELEASE-NOTES and version number
Bobby R. Bruce
2021-02-19 15:35:05 -08:00
-
2c048bb097
scons: Fixing build errors with scons 4.0.1 and 4.1.0
Hoa Nguyen
2021-02-18 00:53:02 -08:00
-
d32c140bde
arch,cpu: Move the inUserMode function to the ISA object.
Gabe Black
2021-01-18 01:10:54 -08:00
-
f69811ad20
base-stats,python: Update PyBind11 ScalarInfo fields to readonly
Bobby R. Bruce
2021-02-18 13:31:22 -08:00
-
4dc66b03f1
base-stats,python: Expose FormulaInfo via PyBind11
Bobby R. Bruce
2021-01-17 20:46:22 -08:00
-
10cccabd15
base-stats,python: Expose VectorInfo via Pybind11
Bobby R. Bruce
2021-01-17 20:43:58 -08:00
-
45b37b7eff
base-stats,python: Expose DistInfo via Pybind11
Bobby R. Bruce
2021-01-17 20:32:49 -08:00
-
41928dac80
misc: Remove unused params() definitions
Giacomo Travaglini
2021-02-18 11:13:45 +00:00
-
92ba3ba843
misc: Use PARAMS
Alexander Klimov
2021-01-26 08:21:53 +00:00
-
c8a2114df2
arch: Eliminate the getArgument function.
Gabe Black
2021-01-17 22:51:13 -08:00
-
6c32f9e521
base: Remove hostname from hostinfo
Daniel R. Carvalho
2021-02-13 11:45:28 -03:00
-
eb76992dad
base: Clean up base/hostinfo
Daniel R. Carvalho
2021-02-13 10:44:01 -03:00
-
7ca5ed70e6
base: Fix scientific number conversion in base/str
Daniel R. Carvalho
2020-12-31 11:52:06 -03:00
-
9d04b1b4e6
arm,kern: Stop using the getArgument function for kernel events.
Gabe Black
2021-01-17 22:46:36 -08:00
-
8633802c3e
mem-ruby: alternative interface for func. reads
Tiago Mück
2020-05-17 20:07:57 -05:00
-
3fb6492482
mem-ruby: extended transaction profiling
Tiago Mück
2020-07-23 20:59:07 -05:00
-
cd8a278ec6
arch,cpu: Move getExecutingAsid to the ISA class.
Gabe Black
2021-01-17 23:23:39 -08:00
-
dd6801f75c
base: Remove duplicate isPow2 helper
Giacomo Travaglini
2021-02-17 14:39:55 +00:00
-
6b23ef320a
base: Exclude the end of ChannelAddrRange
Alexander Klimov
2021-01-20 11:16:06 +00:00
-
2334689b57
arch-arm,sim: make compile on FreeBSD
Bjoern A. Zeeb
2021-02-12 11:48:47 +00:00
-
9a0b79459d
misc: Fix mismatched struct/class "tags" and reenable that warning.
Gabe Black
2021-02-07 23:17:49 -08:00
-
55a3e35388
cpu,mem: Add or remove parenthesis to make the compiler happy.
Gabe Black
2021-02-07 23:53:57 -08:00
-
28564ef315
arch-riscv: Using Softfloat Library to implements float operation
kai.ren
2021-01-26 10:38:59 +08:00
-
3a9d0de609
ext: Add SoftFloat Library to ext directory
kai.ren
2021-01-21 15:53:33 +08:00
-
d07fd9667e
base: Introduce a version of reverseBits for 8 bit types.
Gabe Black
2021-02-17 23:25:56 -08:00
-
e12fc34bd1
scons: Move imports below version checks in site_init.py.
Gabe Black
2021-02-08 01:57:54 -08:00
-
3c23c3f075
cpu: Use std::abs() in traffic_gen.cc.
Gabe Black
2021-02-18 02:35:38 -08:00
-
11f0fe0283
scons,systemc: Drop the check for gcc version when building systemc.
Gabe Black
2021-02-17 23:30:09 -08:00
-
d90461d067
sim: Define PARAMS macro utility
Alexander Klimov
2021-01-26 08:21:20 +00:00
-
a0b5b999b0
scons: Enable LTO for opt, perf and prof builds.
Gabe Black
2021-02-05 21:43:40 -08:00
-
96a8073212
base: Clean up style in bitfield.(hh|cc|test.cc).
Gabe Black
2021-02-15 18:18:05 -08:00
-
1a13423408
base: Add some operators to the BitUnion types.
Gabe Black
2021-02-16 22:34:14 -08:00
-
12d9fadc59
util: Delete the build_cross_gcc utility.
Gabe Black
2021-02-16 00:10:38 -08:00
-
01294faea6
util: Add a crosstool-ng defconfig for RISCV.
Gabe Black
2021-02-16 00:09:07 -08:00
-
205f8fdb5d
mem-ruby: add TBEStorage structure
Tiago Mück
2020-09-21 19:54:52 -05:00