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  • 23071cfd8d util,python: Add escape chars to lowp_dram_sweep_ploy.py Bobby R. Bruce 2021-06-21 11:19:30 -07:00
  • dd57e9216a mem-ruby: Fix nonsensical check in MOESI_CMP_token-L1cache Bobby R. Bruce 2021-05-20 10:32:42 -07:00
  • 09b71163be fastmodel: Fix scx_get_parameter_list for ARM fastmodels. Philip Metzler 2021-05-17 22:49:38 -07:00
  • 89dea636c9 util-docker: Use python3 by default for Ubuntu 18.04 docker images Hoa Nguyen 2021-05-05 15:36:17 -07:00
  • e6ebda374a configs: restore_simpoint_checkpoint should be a boolean Giacomo Travaglini 2021-04-21 11:44:40 +01:00
  • 33cb1d833b util: Fix cpt_upgrader format string Giacomo Travaglini 2021-04-16 00:15:01 +01:00
  • 7be718a6ef dev: Fix GCN3_X86 builds on aarch64 host Giacomo Travaglini 2021-04-14 10:06:23 +01:00
  • 20e2c8da22 systemc: Fix verify.py and make it python 3 compatible Yu-hsin Wang 2021-04-12 16:32:02 +08:00
  • 53da68d661 systemc: Eliminate ClockTick duplicated name warning Yu-hsin Wang 2021-04-12 15:01:35 +08:00
  • 5b07a0787b scons: Reverts LTO for opt, perf and prof builds. Bobby R. Bruce 2021-04-27 11:51:27 -07:00
  • 935819c37b python,scons: Only generate pybind if using python Jason Lowe-Power 2021-06-11 09:44:15 -07:00
  • 356b4dc476 scons,python: revert Always generate default create() methods. Jason Lowe-Power 2021-06-11 09:55:03 -07:00
  • 4e028f8412 cpu-o3: Fix "OldestReady" scheduling bug Marton Erdos 2021-06-17 02:34:09 +01:00
  • 8eefaa58af cpu-o3: Removed "Aggressive" SMT scheduling option Marton Erdos 2021-06-17 02:30:25 +01:00
  • 4b7e67b151 base,tests: Fix trace.test.cc for .fast Bobby R. Bruce 2021-06-17 11:16:53 -07:00
  • 499a1cc7e8 base-stats,mem: Fix empty Stats::Info names Daniel R. Carvalho 2021-03-21 16:00:57 -03:00
  • cdc5758b51 base: Document the SymbolTable Daniel R. Carvalho 2021-03-17 10:35:29 -03:00
  • f43febb218 base-stats: Fix null addStatGroup Daniel R. Carvalho 2021-03-15 00:17:24 -03:00
  • af2d420b42 base-stats: Fix self addition bug in addStatGroup Daniel R. Carvalho 2021-03-15 00:07:18 -03:00
  • 71653e20fb base-stats: Remove Stats::Group dependency from Stats::Info Daniel R. Carvalho 2021-03-21 11:28:13 -03:00
  • f5204295b1 base-stats: Remove SimObject dependency from stats group Daniel R. Carvalho 2021-03-13 13:44:42 -03:00
  • a1a71a128d sim: Remove SimObject dependency from Drainable Daniel R. Carvalho 2021-02-12 17:33:55 -03:00
  • a906e04cb7 sim: Make SimObject inherit from Named Daniel R. Carvalho 2021-03-18 10:13:22 -03:00
  • bac49a04b5 base: Make Named::name() non-reference Daniel R. Carvalho 2021-03-19 17:01:19 -03:00
  • ad5ae10c8e base: Make Named::name() virtual Daniel R. Carvalho 2021-03-18 10:07:34 -03:00
  • 5f0e38bab0 sim: Add missing compiler include Daniel R. Carvalho 2021-06-15 15:56:50 -03:00
  • 94d44ada63 sim: Add unit test for sim/port Daniel R. Carvalho 2021-03-12 21:35:19 -03:00
  • 7f5bd15f51 base: Add unit test for base/trace.hh Daniel R. Carvalho 2021-01-15 16:01:10 -03:00
  • 43f3c51bce sim: Make IniFile non-pointer in CheckpointIn Daniel R. Carvalho 2020-12-28 11:01:41 -03:00
  • 05c0d52370 sim: Remove SimObject dependency from serialize.hh Daniel R. Carvalho 2020-12-27 14:22:40 -03:00
  • 18de63cea0 sim: Remove (UN)SERIALIZE_OBJ_PTR Daniel R. Carvalho 2021-06-09 22:05:05 -03:00
  • 19c7429520 sim,util: Remove event dependencies from serialize.hh Daniel R. Carvalho 2021-03-24 00:32:42 -03:00
  • c493d2c4ad sim,mem-ruby: Handle interleaved device memory Matthew Poremba 2021-06-03 12:22:50 -05:00
  • b0f534346a mem-cache: queued prefetcher bug fix sacak32 2021-06-10 11:30:59 +02:00
  • 6977456207 util: Fix typo in cpt upgrader Daniel R. Carvalho 2021-06-11 09:43:02 -03:00
  • 3adefc2dd9 dev-amdgpu: Handle framebuffer counter accesses Matthew Poremba 2021-05-28 18:58:11 -05:00
  • f46c9ddbfb util: Add scripts to recreate amdgpu ROM and MMIOs Matthew Poremba 2021-05-28 15:40:15 -05:00
  • e9bac9df87 dev-amdgpu,configs: checkpoint before MMIOs Matthew Poremba 2021-05-13 18:50:32 -05:00
  • 7426a0da8e dev-amdgpu: Implement MMIO trace reader Matthew Poremba 2021-05-28 15:20:07 -05:00
  • ca12a8997d mem-ruby,sim: Add support for VGA ROM memory region Matthew Poremba 2021-05-28 15:18:03 -05:00
  • 182ef827c8 cpu: Implement basic HTM capabilities in the CheckerCPU Giacomo Travaglini 2021-06-07 16:19:17 +01:00
  • 0249cb0107 tests: Add nightly tests script to the gem5 repo Bobby R. Bruce 2021-06-04 16:56:37 -07:00
  • 43ac896c9d tests: Move compiler-tests.sh script from "util" to "tests" Bobby R. Bruce 2021-06-04 16:02:01 -07:00
  • 10bb6b076a arch-arm: Remove the TLB::flush overload for TLBI IPA Giacomo Travaglini 2020-10-06 15:09:50 +01:00
  • af1e8667e1 arch-arm: Remove stage2 TLBI flushes from stage1 flushes Giacomo Travaglini 2020-10-06 13:51:44 +01:00
  • 31b37a7f73 cpu: Register the ThreadContext in the CheckerCPU's ISA Giacomo Travaglini 2021-06-07 16:13:06 +01:00
  • 5d6bb698f2 cpu: Do not generate a DTB node in the CheckerCPU Giacomo Travaglini 2021-06-07 15:53:24 +01:00
  • f1fd8cf747 cpu: Fix MMU port addition from the CheckerCPU Giacomo Travaglini 2021-06-07 15:52:15 +01:00
  • 7a5585ef51 cpu: Fix import in O3 CheckerCPU Giacomo Travaglini 2021-06-07 15:50:15 +01:00
  • 23cb3a9fa1 cpu-o3: Add loadToUse stat Tom Rollet 2021-06-01 14:45:48 +02:00
  • a83c2f30df arch-arm: Remove Stage2MMU Giacomo Travaglini 2020-10-06 13:02:23 +01:00
  • c3eee3ca5a cpu-o3: fix commit DPRINTF ROB arguments order Tom Rollet 2021-06-01 15:04:51 +02:00
  • bb5251a27e cpu-o3: fix dispatch assert triggering on debug mode Tom Rollet 2021-06-01 15:35:34 +02:00
  • b79300bcac configs: Improve error message of missing files Hoa Nguyen 2021-05-05 01:56:29 -07:00
  • 40715206f4 mem-ruby: Fix RubySystem::functionalRead with partial data Gabriel Busnot 2021-06-07 14:47:21 +02:00
  • 9c2aac17b9 mem-ruby: Rename WriteMask::cmpMask to containsMask Gabriel Busnot 2021-06-07 14:00:14 +02:00
  • 5a5fb03c77 mem-ruby: Fix wrong test in CHI functional reads Gabriel Busnot 2021-05-21 11:00:32 +02:00
  • c290ead895 arch-riscv: Update the way a valid virtual address is computed Ayaz Akram 2021-05-25 01:58:54 -07:00
  • cfa028291e util: Make sorted includes verifier less confusing Hoa Nguyen 2021-06-07 12:21:05 -07:00
  • 59879e3794 systemc: include <typeinfo> Iru Cai 2021-06-03 18:33:28 +08:00
  • 90d56af474 dev: add a falsely removed if condition check in commit 03a00e5d3 Iru Cai 2021-04-28 14:33:10 +08:00
  • 2f8a8508fb util: Rename recently renamed namespaces Daniel R. Carvalho 2021-06-04 19:44:59 -03:00
  • 89e36417d4 util,systemc: Fix create and params signature Daniel R. Carvalho 2021-06-04 19:29:42 -03:00
  • 4e3eaa7d9d systemc: Fix module not found Daniel R. Carvalho 2021-06-04 19:05:31 -03:00
  • c01b9cd62b mem: Fix bandwidth-delay calculation in AMPM prefetcher Arthur Perais 2021-06-04 09:46:14 +02:00
  • 31de35c8be mem-ruby: Appease compiler with return values Daniel R. Carvalho 2021-05-31 11:38:13 -03:00
  • 9ccd814418 cpu-kvm: Fix missing includes Daniel R. Carvalho 2021-06-01 16:13:40 -03:00
  • cc8a1138c7 tests: Revert "Add sleep and debug to the jenkins ..." Bobby R. Bruce 2021-06-03 10:38:00 -07:00
  • 554086389c tests,arch-arm: Replaced X86 clang fast build for ARM_MESI_THREE Bobby R. Bruce 2020-12-03 15:48:10 -08:00
  • fe27242f26 python: Fix include of pybind Daniel R. Carvalho 2021-05-30 09:06:52 -03:00
  • 9c6df1b55b fastmodel: Fix building with Fast Model. Gabe Black 2021-05-27 17:16:13 -07:00
  • 419ebd724e mem-ruby: replace desks, add desc where required Hoa Nguyen 2021-05-27 12:13:17 -07:00
  • b04bf8f729 configs: fix se.py error when using "--redirects" Hoa Nguyen 2021-05-27 11:46:37 -07:00
  • 96f9372a81 cpu-o3: Prevent a mistarget from sending execution on an incorrect path Arthur Perais 2021-06-01 11:30:58 +02:00
  • 51e8fd45e8 systemc: Set verify.py shebang to python3 Yu-hsin Wang 2021-05-25 18:07:13 +08:00
  • 3aa64284b1 dev-arm: add ArmSigInterruptPin Yu-hsin Wang 2021-05-10 15:06:53 +08:00
  • efc9a68620 mem: Fix Best Offset Prefetcher (BOP) learning phase code. Arthur Perais 2021-05-31 17:20:04 +02:00
  • e2edde5cd5 cpu-o3: Prevent SW prefetches from forwarding from STQ Arthur Perais 2021-06-01 11:51:24 +02:00
  • 93e5734685 mem: Rename "memory" variables as "mem" Daniel R. Carvalho 2021-05-08 07:59:47 -03:00
  • 98ac080ec4 base-stats,misc: Rename Stats namespace as statistics Daniel R. Carvalho 2021-05-06 20:00:51 -03:00
  • fa505f1c23 cpu-minor: Rename Minor namespace as minor Daniel R. Carvalho 2021-05-06 20:49:40 -03:00
  • 9f55bb8478 base: Rename Loader namespace as loader Daniel R. Carvalho 2021-05-06 20:19:18 -03:00
  • a658ea043f base,dev,mem-ruby: Rename m5 namespace as gem5 Daniel R. Carvalho 2021-05-09 11:28:34 -03:00
  • c151239aa2 base,dev: Rename major and minor variables Daniel R. Carvalho 2021-05-08 11:00:28 -03:00
  • 4dd099ba3d misc: Rename Enums namespace as enums Daniel R. Carvalho 2021-05-06 16:18:58 -03:00
  • 06fb0753fe base,dev,python: Rename Net namespace as networking Daniel R. Carvalho 2021-05-06 15:50:55 -03:00
  • 90aab2f926 sim: Rename ProbePoints namespace as probing Daniel R. Carvalho 2021-05-06 15:02:22 -03:00
  • e291376f07 cpu,mem: Rename ContextSwitchTaskId namespace Daniel R. Carvalho 2021-05-06 07:03:14 -03:00
  • df72e9d548 mem-cache: Rename Prefetcher namespace as prefetch Daniel R. Carvalho 2021-05-08 07:32:23 -03:00
  • b34d73af27 sim: Make PortProxy args in BaseBufferArg const ref. Gabe Black 2021-05-23 02:04:42 -07:00
  • fc3e7214de cpu,fastmodel: Get rid of the unused ThreadContext::getPhysProxy. Gabe Black 2021-05-23 01:45:36 -07:00
  • edc17fe9ec x86: Avoid including arch/x86/registers.hh. Gabe Black 2021-02-01 18:22:42 -08:00
  • a91af24e60 misc: Clean up ISA switching header includes. Gabe Black 2021-02-01 17:51:52 -08:00
  • 8ab9e72804 arch,base,cpu: Split arch/pcstate.hh out of arch/types.hh. Gabe Black 2021-01-29 23:01:31 -08:00
  • 1cf41d4c54 arch-riscv: Split up read/write and read only CSR instructions. Gabe Black 2021-05-14 02:38:42 -07:00
  • 2a0e4ae3ea mem-cache: Rename Encoder namespace as encoder Daniel R. Carvalho 2021-05-06 15:11:48 -03:00
  • c84888b67a mem-cache: Rename encoder variables as indexEncoder Daniel R. Carvalho 2021-05-08 10:04:56 -03:00
  • 495f0cb63d mem-cache: Rename Compressor namespace as compression Daniel R. Carvalho 2021-05-06 09:40:35 -03:00
  • d9bda9c2be cpu,fastmodel: Get rid of unused (read|set)FuncExeInst. Gabe Black 2021-05-23 01:34:53 -07:00
  • d583a9a227 arch: Template the generic PC types on the instruction width. Gabe Black 2021-01-29 21:16:25 -08:00