cpu: Do not generate a DTB node in the CheckerCPU
The CheckerCPU is not a real CPU and shouldn't generate a DTB node. This is why we are skipping the BaseCPU implementation and we are calling the base SimObject one. Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Change-Id: I42326be9d4c440846fdf8d43bf809ad4d50f61d9 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46622 Reviewed-by: Richard Cooper <richard.cooper@arm.com> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
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@@ -27,6 +27,7 @@
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from m5.params import *
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from m5.objects.BaseCPU import BaseCPU
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from m5.SimObject import SimObject
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class CheckerCPU(BaseCPU):
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type = 'CheckerCPU'
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@@ -37,3 +38,9 @@ class CheckerCPU(BaseCPU):
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"Update the checker with the main CPU's state on an error")
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warnOnlyOnLoadError = Param.Bool(True,
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"If a load result is incorrect, only print a warning and do not exit")
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def generateDeviceTree(self, state):
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# The CheckerCPU is not a real CPU and shouldn't generate a DTB
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# node. This is why we are skipping the BaseCPU implementation
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# and we are calling the base SimObject one.
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return SimObject.generateDeviceTree(self, state)
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