cpu,mem: Rename ContextSwitchTaskId namespace

As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ContextSwitchTaskId becomes ::context_switch_task_id.

Change-Id: If3884a5da7afe6144954d556b3b54f659bb7afb5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45411
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>

src/arch/arm/linux/fs_workload.cc

@@ -255,9 +255,9 @@ FsLinux::mapPid(ThreadContext *tc, uint32_t pid)
     std::map<uint32_t, uint32_t>::iterator itr = taskMap.find(pid);
     if (itr == taskMap.end()) {
         uint32_t map_size = taskMap.size();
-        if (map_size > ContextSwitchTaskId::MaxNormalTaskId + 1) {
+        if (map_size > context_switch_task_id::MaxNormalTaskId + 1) {
             warn_once("Error out of identifiers for cache occupancy stats");
-            taskMap[pid] = ContextSwitchTaskId::Unknown;
+            taskMap[pid] = context_switch_task_id::Unknown;
         } else {
             taskMap[pid] = map_size;
         }

src/arch/arm/table_walker.cc

@@ -159,7 +159,7 @@ TableWalker::Port::createPacket(
 {
     RequestPtr req = std::make_shared<Request>(
         desc_addr, size, flags, requestorId);
-    req->taskId(ContextSwitchTaskId::DMA);
+    req->taskId(context_switch_task_id::DMA);
 
     PacketPtr pkt = new Packet(req, MemCmd::ReadReq);
     pkt->dataStatic(data);

src/cpu/base.cc

@@ -125,7 +125,7 @@ BaseCPU::BaseCPU(const Params &p, bool is_checker)
     : ClockedObject(p), instCnt(0), _cpuId(p.cpu_id), _socketId(p.socket_id),
       _instRequestorId(p.system->getRequestorId(this, "inst")),
       _dataRequestorId(p.system->getRequestorId(this, "data")),
-      _taskId(ContextSwitchTaskId::Unknown), _pid(invldPid),
+      _taskId(context_switch_task_id::Unknown), _pid(invldPid),
       _switchedOut(p.switched_out), _cacheLineSize(p.system->cacheLineSize()),
       interrupts(p.interrupts), numThreads(p.numThreads), system(p.system),
       previousCycle(0), previousState(CPU_STATE_SLEEP),

src/dev/arm/gic_v3_its.cc

@@ -96,7 +96,7 @@ ItsProcess::doRead(Yield &yield, Addr addr, void *ptr, size_t size)
     RequestPtr req = std::make_shared<Request>(
         addr, size, 0, its.requestorId);
 
-    req->taskId(ContextSwitchTaskId::DMA);
+    req->taskId(context_switch_task_id::DMA);
 
     a.pkt = new Packet(req, MemCmd::ReadReq);
     a.pkt->dataStatic(ptr);
@@ -120,7 +120,7 @@ ItsProcess::doWrite(Yield &yield, Addr addr, void *ptr, size_t size)
     RequestPtr req = std::make_shared<Request>(
         addr, size, 0, its.requestorId);
 
-    req->taskId(ContextSwitchTaskId::DMA);
+    req->taskId(context_switch_task_id::DMA);
 
     a.pkt = new Packet(req, MemCmd::WriteReq);
     a.pkt->dataStatic(ptr);

src/dev/arm/smmu_v3_proc.cc

@@ -81,7 +81,7 @@ SMMUProcess::doRead(Yield &yield, Addr addr, void *ptr, size_t size)
     RequestPtr req = std::make_shared<Request>(
         addr, size, 0, smmu.requestorId);
 
-    req->taskId(ContextSwitchTaskId::DMA);
+    req->taskId(context_switch_task_id::DMA);
 
     a.pkt = new Packet(req, MemCmd::ReadReq);
     a.pkt->dataStatic(ptr);
@@ -114,7 +114,7 @@ SMMUProcess::doWrite(Yield &yield, Addr addr, const void *ptr, size_t size)
     RequestPtr req = std::make_shared<Request>(
         addr, size, 0, smmu.requestorId);
 
-    req->taskId(ContextSwitchTaskId::DMA);
+    req->taskId(context_switch_task_id::DMA);
 
     a.pkt = new Packet(req, MemCmd::WriteReq);
     a.pkt->dataStatic(ptr);

src/dev/dma_device.cc

@@ -114,7 +114,7 @@ DmaPort::DmaReqState::createPacket()
             gen.addr(), gen.size(), flags, id);
     req->setStreamId(sid);
     req->setSubstreamId(ssid);
-    req->taskId(ContextSwitchTaskId::DMA);
+    req->taskId(context_switch_task_id::DMA);
 
     PacketPtr pkt = new Packet(req, cmd);
 

src/mem/cache/cache_blk.hh

@@ -201,7 +201,7 @@ class CacheBlk : public TaggedEntry
         clearPrefetched();
         clearCoherenceBits(AllBits);
 
-        setTaskId(ContextSwitchTaskId::Unknown);
+        setTaskId(context_switch_task_id::Unknown);
         setWhenReady(MaxTick);
         setRefCount(0);
         setSrcRequestorId(Request::invldRequestorId);

src/mem/cache/prefetch/queued.cc

@@ -63,7 +63,7 @@ Queued::DeferredPacket::createPkt(Addr paddr, unsigned blk_size,
     if (pfInfo.isSecure()) {
         req->setFlags(Request::SECURE);
     }
-    req->taskId(ContextSwitchTaskId::Prefetcher);
+    req->taskId(context_switch_task_id::Prefetcher);
     pkt = new Packet(req, MemCmd::HardPFReq);
     pkt->allocate();
     if (tag_prefetch && pfInfo.hasPC()) {

src/mem/cache/tags/base.cc

@@ -162,7 +162,7 @@ BaseTags::computeStatsVisitor(CacheBlk &blk)
 {
     if (blk.isValid()) {
         const uint32_t task_id = blk.getTaskId();
-        assert(task_id < ContextSwitchTaskId::NumTaskId);
+        assert(task_id < context_switch_task_id::NumTaskId);
         stats.occupanciesTaskId[task_id]++;
         Tick age = blk.getAge();
 
@@ -185,7 +185,7 @@ BaseTags::computeStatsVisitor(CacheBlk &blk)
 void
 BaseTags::computeStats()
 {
-    for (unsigned i = 0; i < ContextSwitchTaskId::NumTaskId; ++i) {
+    for (unsigned i = 0; i < context_switch_task_id::NumTaskId; ++i) {
         stats.occupanciesTaskId[i] = 0;
         for (unsigned j = 0; j < 5; ++j) {
             stats.ageTaskId[i][j] = 0;
@@ -274,12 +274,12 @@ BaseTags::BaseTagStats::regStats()
     avgOccs = occupancies / Stats::constant(tags.numBlocks);
 
     occupanciesTaskId
-        .init(ContextSwitchTaskId::NumTaskId)
+        .init(context_switch_task_id::NumTaskId)
         .flags(nozero | nonan)
         ;
 
     ageTaskId
-        .init(ContextSwitchTaskId::NumTaskId, 5)
+        .init(context_switch_task_id::NumTaskId, 5)
         .flags(nozero | nonan)
         ;
 

src/mem/request.hh

@@ -57,6 +57,7 @@
 #include <vector>
 
 #include "base/amo.hh"
+#include "base/compiler.hh"
 #include "base/flags.hh"
 #include "base/types.hh"
 #include "cpu/inst_seq.hh"
@@ -70,8 +71,9 @@
  * doesn't cause a problem with stats and is large enough to realistic
  * benchmarks (Linux/Android boot, BBench, etc.)
  */
-
-namespace ContextSwitchTaskId {
+GEM5_DEPRECATED_NAMESPACE(ContextSwitchTaskId, context_switch_task_id);
+namespace context_switch_task_id
+{
     enum TaskId
     {
         MaxNormalTaskId = 1021, /* Maximum number of normal tasks */
@@ -395,7 +397,7 @@ class Request
     /**
      * The task id associated with this request
      */
-    uint32_t _taskId = ContextSwitchTaskId::Unknown;
+    uint32_t _taskId = context_switch_task_id::Unknown;
 
     /**
      * The stream ID uniquely identifies a device behind the