mem: Fix bandwidth-delay calculation in AMPM prefetcher

The AMPM paper (https://www.jilp.org/vol13/v13paper3.pdf) defines
the bandwidth-delay calculation as :

  Mbandwidth= (Nrequests/Tepoch)×Tlatency

In the code, Tepoch and Tlatency are in ticks (which is okay),
but Tepoch is converted from Cycles (256K) to Ticks using the
clockEdge(Cycle c) function, which is incorrect as it yields currentTick
+ c * clockPeriod() instead of just c * clockPeriod().
In other words, the divider keeps increasing as time advances.

This patch substitutes clockEdge() with cyclesToTicks() to keep
the epoch length (Tepoch) constant throughout simulation.

Change-Id: I69dee29892fa4b9eb8de8715fd72a535e122687f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46479
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/mem/cache/prefetch/access_map_pattern_matching.cc

@@ -80,7 +80,7 @@ AccessMapPatternMatching::processEpochEvent()
     double num_requests = (double) (numRawCacheMisses - numGoodPrefetches +
         numTotalPrefetches);
     double memory_bandwidth = num_requests * offChipMemoryLatency /
-        clockEdge(epochCycles);
+        cyclesToTicks(epochCycles);
 
     if (prefetch_coverage > highCoverageThreshold &&
         (prefetch_accuracy > highAccuracyThreshold ||