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cpu-o3: fix commit DPRINTF ROB arguments order

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Change-Id: I7a2bacc5d7e3d8bab47adb762d3f88f2b2fd6e1d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46599
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Tom Rollet
2021-06-01 15:04:51 +02:00
parent bb5251a27e
commit c3eee3ca5a
1 changed files with 2 additions and 2 deletions
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4
src/cpu/o3/commit.cc
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@@ -1342,7 +1342,7 @@ Commit::getInsts()
changedROBNumEntries[tid] = true;
DPRINTF(Commit, "[tid:%i] [sn:%llu] Inserting PC %s into ROB.\n",
inst->seqNum, tid, inst->pcState());
tid, inst->seqNum, inst->pcState());
rob->insertInst(inst);
@@ -1352,7 +1352,7 @@ Commit::getInsts()
} else {
DPRINTF(Commit, "[tid:%i] [sn:%llu] "
"Instruction PC %s was squashed, skipping.\n",
inst->seqNum, tid, inst->pcState());
tid, inst->seqNum, inst->pcState());
}
}
}