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acdf3a63de84cc31025af4ae3976347995e49fd5
gem5/src/arch/arm
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Giacomo Travaglini acdf3a63de arch-arm: Generalize SCTLR_RST behaviour 
This is supposed to be employed as a reset value for SCTLR.
Rather than implementing this misc reg specific feature, we
provide a more general logic for changing the reset value
of any register.

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Ib61019ec499b35382289fe18740c90eee5de4907
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70459
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
2023-05-11 08:25:24 +00:00
..
fastmodel
fastmodel: Remove sendFunc
2023-05-04 07:53:50 +00:00
freebsd
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
gdb-xml
scons: Use tags to gate ISA files and not env['TARGET_ISA'].
2021-10-19 20:41:03 +00:00
insts
base: Fix gcc-13 build error
2023-03-04 02:08:41 +00:00
isa
base,arch,mem: Remove {GE}M5_VAR_USED instances
2023-05-08 22:54:06 +00:00
kvm
arch-arm, kvm: Fix KVM_ARM_IRQ_VCPU2_SHIFT compilation error
2022-09-07 08:13:15 +00:00
linux
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
regs
arch-arm: Generalize SCTLR_RST behaviour
2023-05-11 08:25:24 +00:00
tracers
arch-arm: Fix formatting of v8 Tarmac Register records
2023-04-13 21:09:36 +00:00
aapcs32.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
aapcs64.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
aapcs64.test.cc
misc: Replace type_traits.hh XX::value with XX_v.
2021-07-28 01:48:03 +00:00
ArmCPU.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
ArmDecoder.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
ArmFsWorkload.py
python: Fix multiline quotes in a single line
2022-11-29 23:44:38 +00:00
ArmInterrupts.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
ArmISA.py
arch-arm: Add system registers added/used by SME
2023-01-17 10:09:56 +00:00
ArmMMU.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
ArmNativeTrace.py
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
ArmPMU.py
arch-arm: Add support to exit the simloop on PMU interrupt
2023-05-10 07:44:00 +00:00
ArmSemihosting.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
ArmSeWorkload.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
ArmSystem.py
misc: Use python f-strings for string formatting
2023-03-16 09:05:29 +00:00
ArmTLB.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
decoder.cc
arch-arm: Add interfaces to set and get SME vector length
2023-01-17 10:09:56 +00:00
decoder.hh
arch-arm: Add interfaces to set and get SME vector length
2023-01-17 10:09:56 +00:00
faults.cc
arch-arm: Remove deprecated Armv7 debug Vector Catch
2022-12-05 14:58:16 +00:00
faults.hh
arch-arm: Use scoped enum for ExceptionClass
2022-10-17 09:00:59 +00:00
fs_workload.cc
arch-arm: Rework the int regs.
2022-06-08 20:33:42 +00:00
fs_workload.hh
sim: allow specifying remote gdb port for each workload
2022-11-03 05:34:09 +00:00
htm.cc
arch: Minimize use of RegClassType constants and the RegId constructor.
2022-07-27 10:59:07 +00:00
htm.hh
arch-arm: Rework the int regs.
2022-06-08 20:33:42 +00:00
interrupts.cc
arch-arm: Always use AArch64 version of HCR/SCR
2022-10-27 10:31:10 +00:00
interrupts.hh
arch-arm: Always use AArch64 version of HCR/SCR
2022-10-27 10:31:10 +00:00
isa_device.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa_device.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa.cc
arch-arm: Generalize SCTLR_RST behaviour
2023-05-11 08:25:24 +00:00
isa.hh
arch-arm: Generalize SCTLR_RST behaviour
2023-05-11 08:25:24 +00:00
matrix.hh
arch-arm: Add matrix register support for SME
2023-01-17 10:09:56 +00:00
matrix.test.cc
arch-arm: Add matrix register support for SME
2023-01-17 10:09:56 +00:00
mmu.cc
arch-arm: Always use AArch64 version of HCR/SCR
2022-10-27 10:31:10 +00:00
mmu.hh
arch-arm: Properly assign the global tag to TLB entries
2022-09-01 08:27:31 +00:00
nativetrace.cc
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
nativetrace.hh
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
page_size.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable.cc
arch-arm: Add walkBits method to PageTableOps
2021-10-27 09:05:44 +00:00
pagetable.hh
arch-arm: Add partial param to TlbEntry
2021-12-10 16:09:09 +00:00
pauth_helpers.cc
arch-arm: Use scoped enum for ExceptionClass
2022-10-17 09:00:59 +00:00
pauth_helpers.hh
arch-arm: XPACD, XPACI, XPACLRI do not trap
2022-08-17 13:30:08 +00:00
pcstate.hh
arch,cpu: Make branching() a virtual member of PCStateBase.
2021-11-30 23:30:06 +00:00
pmu.cc
arch-arm: Add support to exit the simloop on PMU interrupt
2023-05-10 07:44:00 +00:00
pmu.hh
arch-arm: Add support to exit the simloop on PMU interrupt
2023-05-10 07:44:00 +00:00
process.cc
arch-arm: Rework the int regs.
2022-06-08 20:33:42 +00:00
process.hh
arch-arm: Rework the int regs.
2022-06-08 20:33:42 +00:00
qarma.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
qarma.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
reg_abi.cc
arch: Switch the generic register ABI over to use RegId.
2022-06-19 07:48:14 +00:00
reg_abi.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
remote_gdb.cc
arch,base,dev,sim: Convert objects to use the HostSocket param type.
2023-04-12 02:18:22 +00:00
remote_gdb.hh
arch,base,dev,sim: Convert objects to use the HostSocket param type.
2023-04-12 02:18:22 +00:00
SConscript
arch-arm, cpu: Implement instructions added by FEAT_SME
2023-01-17 10:09:56 +00:00
SConsopts
misc: Replace TARGET_ISA with USE_${ISA} variables.
2022-09-02 10:20:51 +00:00
se_workload.hh
sim: allow specifying remote gdb port for each workload
2022-11-03 05:34:09 +00:00
self_debug.cc
misc: Fix 'unused variable' clang errors with gem5.fast
2023-05-08 22:54:06 +00:00
self_debug.hh
arch-arm: Remove deprecated Armv7 debug Vector Catch
2022-12-05 14:58:16 +00:00
semihosting.cc
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
semihosting.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
stacktrace.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
stage2_lookup.cc
arch-arm: Move translation logic from the ArmTLB to the ArmMMU
2021-07-28 08:13:09 +00:00
stage2_lookup.hh
arch-arm: Move translation logic from the ArmTLB to the ArmMMU
2021-07-28 08:13:09 +00:00
system.cc
arch-arm: Add system registers added/used by SME
2023-01-17 10:09:56 +00:00
system.hh
arch-arm: Add system registers added/used by SME
2023-01-17 10:09:56 +00:00
table_walker.cc
mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner
2023-02-03 06:11:45 +00:00
table_walker.hh
mem,arch-arm,mem-ruby,cpu: Remove use of deprecated base port owner
2023-02-03 06:11:45 +00:00
tlb.cc
arch-arm: Revamp TLB invalidation by introducing TLBIOp::match
2022-07-30 08:59:49 +00:00
tlb.hh
arch-arm: Revamp TLB invalidation by introducing TLBIOp::match
2022-07-30 08:59:49 +00:00
tlbi_op.cc
arch-arm: Properly implement last level TLBIs
2022-09-15 17:24:06 +00:00
tlbi_op.hh
arch-arm: Properly implement last level TLBIs
2022-09-15 17:24:06 +00:00
types.hh
arch-arm: Implement SME access traps and extend the SVE ones
2023-01-17 10:09:56 +00:00
utility.cc
arch-arm: Remove ISA::haveGICv3CpuIfc method
2022-11-02 08:32:44 +00:00
utility.hh
arch-arm: Generate MSR/MRS iss within trapping logic
2022-07-28 13:24:02 +00:00