Commit Graph

4627 Commits

Author SHA1 Message Date
Gabe Black
c76fa4d39e arch-sparc: Create a local port proxy for functional accesses.
Don't retrieve one from the thread context since it's just as easy to
make one from scratch.

Change-Id: I46a812df656a553cc0bd94f61a371b595412a9b3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45904
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-25 16:57:45 +00:00
Daniel R. Carvalho
8bb0dd3ab9 arch-x86: Rename RomLabels namespace as rom_labels
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

RomLabels became rom_labels.

Change-Id: I972409ab33c595baaf845bf11f2f450ab5938d54
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45396
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-25 09:22:17 +00:00
Gabe Black
62610709df cpu,fastmodel: Get rid of the getSendFunctional method.
Change-Id: Ib901f6a37220357fe9f1863f12ee18daed31a538
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45865
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-25 08:24:30 +00:00
Gabe Black
41e2511259 misc: Stop using BaseCPU::getSendFunctional.
This method is no longer used, and has been replaced by the
ThreadContext::sendFunctional method.

Change-Id: I5a37f44d922245f681b6185c27232150a4eea4f0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45864
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2021-05-25 08:23:49 +00:00
Gabe Black
c32ec6f21e fastmodel: Implement ThreadContext::sendFunctional.
This change provides a custom implementation for the
ThreadContext::sendFunctional method.

Change-Id: Idffb4efc509dd63c852ada0768435bf653bd1854
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45862
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-24 22:45:28 +00:00
Gabe Black
1a33023815 arch-x86: Work around a bug in g++ 6 and 7.
These versions of g++ don't handle parameter pack expansion correctly
when there is a parameter pack defined at the class level and then one
which is defined by the constructor itself. Even though it knows what
the outter parameter pack contains, it still re-assigns it to be empty
and puts all arguments into the later parameter pack.

To work around this problem, we will explicitly put the class level
parameters into a tuple, which we then have to go through extra
acrobatics to explode and pass into base class constructors.

That also means that in all subclasses, the arguments which go into the
tuple need to be wrapped in {}s to group them into constructor arguments
for the tuple.

Change-Id: I3139eebd7042b02f50862d88be5c940583a2a809
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45820
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-21 23:48:31 +00:00
Daniel R. Carvalho
17580efbd7 arch: Rename freebsd loader variables as freebsdLoader
Pave the way for a loader namespace.

Change-Id: Ief6f54cc49840fb6c156d56ba3da52dc0a995ac8
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45423
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-21 23:10:39 +00:00
Daniel R. Carvalho
10c0fb84ad arch: Rename some linux loader variables as linuxLoader
Pave the way for a loader namespace.

Change-Id: Ie7c811e74424063ff773569e7ad9df9dde166d4f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45422
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-21 23:10:39 +00:00
Giacomo Travaglini
14b616d440 arch: Make MMU::flushAll virtual
This is enabling ISA specific MMUs to reimplement the flushing
according to their TLB structure

Change-Id: Ic407ab95137b299206cb94926fb69d8898ed33f8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45779
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-21 08:32:25 +00:00
Giacomo Travaglini
da01b59a1c arch-arm: Stop using the DmaPort in the TableWalker
Using a custom TableWalker port instead

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I9e77324569ef0f74f6c8a3941f90bc988abf3c57
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45599
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-21 08:32:25 +00:00
Gabe Black
ea46bfee0f arch-riscv: When an inst generates a fault, return it immediately.
When a fault is generated, it needs to be returned, and nothing else
should be done. There's no point in keeping it around and having to
check over and over if there was a fault and if other parts of the
execute functions should be skipped.

This simplifies the logic a bit which should speed up execution, and
also makes life easier for the compiler since behavior is obvious and
doesn't have to be deduced from possible data values and ifs.

Change-Id: I2004c7d22ac6222e1ef2acb51d49b4eb2e60b144
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45520
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
2021-05-20 23:42:13 +00:00
Gabe Black
4abe9ac08b misc: Switch away from the deprecated UNIT_* macros.
Expand the macros in place.

Change-Id: I5dba512b99a1204c23a995e112248b86523b77c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45560
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-19 21:42:34 +00:00
Giacomo Travaglini
a84a15ab17 arch-arm: Fix FEAT_VMID16 for Self Hosted debug
The existing code was querying the vmidbits but it was not checking the
VTCR_EL2.VS bit, which dynamically enables/disables VMID16

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Id1e7df758a636267173c4fcd4db99e5834f21ee9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45659
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-19 08:46:58 +00:00
Philip Metzler
157e7e2e3b fastmodel: Fix scx_get_parameter_list for ARM fastmodels.
The first non-critical piece of this CL removes the unused self
from the Python function signature.

Then also includes "stl.h" from pybind11 to allow the
implicit conversion from std::map<std::string, std::string>
to a Python dict (otherwise there will be a runtime (not compile time)
error when calling the function.

As the current implementation always throws an error because of the
missing stl.h I don't believe anyone is using this function, and as such
it should be safe to just change the signature of
scx_get_parameter_list.

Change-Id: Ib3202b2d4d1b8418a4adf54739fe389d4ee07743
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45622
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-18 14:06:52 +00:00
Bobby R. Bruce
7cfc944a29 arch-arm: Fix unused variable error with ARM .fast comp
Change-Id: Ia65a0eb92f498fec379f93d081e7748aacf0724f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45479
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-17 16:46:46 +00:00
Giacomo Travaglini
d578c6992c arch-arm: Enable ARMv8.1-VMID16 by default
Change-Id: Ibeb724cf1e599b10b4ddcc030d3c8eda59afea47
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45188
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-05-17 10:22:41 +00:00
Giacomo Travaglini
1cecc752d7 arch-arm: Implement ARMv8.1-VMID16, 16-bit VMID
In an Armv8.1 implementation, when EL2 is using AArch64, the VMID size
is an IMPLEMENTATION DEFINED choice of 8 bits or 16 bits.
When implemented, this feature is supported only when EL2 is using AArch64.
The ID_AA64MMFR1_EL1.VMIDBits field identifies the supported VMID size.

Change-Id: I7acde0a9ba285d4740771133debd60a7a7515954
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45187
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-17 10:22:41 +00:00
Giacomo Travaglini
cf83aec07a arch-arm: Using 16 bit VMID
Change-Id: Ia4f408b8e84b5f52f6b48fd5d4bbc2a5fac87154
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45186
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-17 10:22:41 +00:00
Daniel R. Carvalho
9b675ebea8 misc: Add missing compiler.hh include
Add some missing base/compiler.hh includes.

Found by manually checking the files in:
  grep -r --include \*.hh -L \
    '#include "base/compiler.hh"' \
    $(grep -r -l "GEM5_" src/)

And occasionally checking some .cc files through
a similar methodology.

Change-Id: I6b6e27189c627bb76ace73c338486743d469be46
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45459
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-14 10:02:14 +00:00
Matthew Poremba
aa19af29ad arch-vega,arch-gcn3: Fix s_cmp_lt_u32
Was using less-than-or-equal rather than less-than. All other comparison
instructions look correct otherwise.

Change-Id: Iee0374554f21a80a6da2eb75f38b22c83b6e1e9c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45499
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-14 07:56:17 +00:00
Gabe Black
3889795886 arch-sparc: Replace M5_HWCAP_SPARC_* constants.
These were not using correct style and were using an obsolete M5 prefix.

Change-Id: I24273857bee2fcf52f203262b431c23665d5e87f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45244
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-12 16:11:11 +00:00
Gabe Black
b1a396bfcf arch: Stop using deprecated M5_AT_* constants.
Also stop using the non-namespaced version of AuxVector.

Change-Id: I26fc0cf1f27c1a1dcae479096b183ab1f5abc8e2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45243
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
2fd7508e9f misc: Replace M5_FOR_EACH_IN_PACK with GEM5_FOR_EACH_IN_PACK.
Change-Id: I5d565c496129033634d2b913f83d014c5e07b1dc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45240
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
c480558532 misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.
Change-Id: Id4cbdb8ae58c1077411e01579ac3a2d72b3b7465
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45238
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
e92f64b0b7 misc: Replace M5_ALIGNED with GEM5_ALIGNED.
Change-Id: Ia06bc959c81e9b37e0a506c022b8f8d86a0897ac
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45237
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
650b27f755 arch-sparc: Replace M5_NO_INLINE with GEM5_NO_INLINE.
Change-Id: Ibea33196765cc2d038d12c1388e6585275eaba55
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45235
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
ce6b5e7e33 misc: Replace M5_ATTR_PACKED with GEM5_PACKED.
Change-Id: Ie59071ca1fc81a76267a54ddd2d35dfc4477995d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45234
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
11fe13c311 misc: Replace M5_FALLTHROUGH with GEM5_FALLTHROUGH.
Change-Id: I058f311b6d9c284f745bcc915db72236d05db21b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45233
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-11 20:16:31 +00:00
Gabe Black
fb3befcc6d misc: Replace M5_VAR_USED with GEM5_VAR_USED.
Change-Id: I64a874ccd1a9ac0541dfa01971d7d620a98c9d32
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45231
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
8076a41183 arch-x86: Build source picking into the operands.
The parser is able to add extra code to generate the operand value, but
we were explicitly adding that code ourselves. That added complexity
particularly to the reg microops, but made other types a little more
complex as well.

Change-Id: Idae36c27662c79302ea9b2831062c8c067ba174c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42971
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-11 04:53:04 +00:00
Gabe Black
cba6374f57 arch: Set %(op_idx)s properly when predicated operands are present.
This should be either the fixed index if there are no predicated
operands (ie operands which may not be used), and an auto incrementing
index otherwise. This is still not bulletproof since the auto
incrementing index is just code which ++-es the index, and so the index
will be different and incremented each time that value is substituted
in.

Also, the mixture of predicated operands and the vector operands is
broken and will not generate compilable code, but I'm not going to try
to fix that here.

Change-Id: I1ceae519649762e54eaa019610e51bb8c21d28d6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42970
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-11 04:52:32 +00:00
Gabe Black
0d390f1593 arch-x86: Create some infrastructure for x86 microop operands.
These are currently only used in the reg, float and media ops, but
should be expanded to the other types eventually. This is part of an
attempt to use common machinery for the microops instead of having
each type recreate the mechanisms it needs locally.

Change-Id: I67f521b6b161310ba50a30ac4c73305cc75a63d5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42969
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-11 04:52:21 +00:00
Gabe Black
1192f16f60 arch-x86: Clean up x86 integer indexes.
Instead of having a bunch of implicit integer registers which are
identified only by number, except in the ISA description where there are
operands hard coded to certain numeric offsets into the implicit
registers, and having an independent count of those implicit registers,
just create a set of named indices for the registers we need.

Redefine NUM_INTREGS to be the total number of registers, and
NUM_ARCH_INTREGS to be the number of architectural integer registers.
Instead of using NUM_INTREGS as a coincidental short hand for the first
microop register (since that comes after the architectural ones), and
implicitly knowing that that's the zero register, define an INTREG_T0
constant which at least makes it clear what register we're talking
about, even if it's not clear that the semantics of that register make
it mostly a placeholder.

Change-Id: I5fa41169b9619ea68a50d6d5241ff9a07440bceb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42523
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-11 04:52:09 +00:00
Gabe Black
16fa9f9812 arch,cpu: Get rid of is*Reg() methods in RegId.
These bake in the existing set of RegClass values and are not flexible
or scalable.

Change-Id: I107460cd82960d96916d1644403b7635820045a0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45226
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-10 20:03:38 +00:00
Gabe Black
8e2c9e64b3 arch-arm: Use src/base/fenv.hh instead of raw fenv.h.
Re-upload of https://gem5-review.googlesource.com/c/public/gem5/+/41214

This provides a layer of indirection where the rounding mode
setting/getting code will do nothing if fenv.h isn't available. At build
time, if fenv.h can't be found, a warning is printed.

Also, the include for fenv.h was guarded in the includes in the ISA
header, but the functions from it weren't guarded in the actual code.

Finally, the code was setting the rounding mode, but not setting it
back. That would mean running these instructions would set the rounding
mode in gem5 as a whole, affecting its other behaviors and any other
instructions that might expect the default rounding mode.

Change-Id: I3ff2b97189487579554aae890e14889bd63461d2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44085
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-10 20:02:32 +00:00
Gabe Black
ab65690895 base,arch-sparc: Overhaul the small fenv wrapper in base.
This was written in C, broke the style guide, used macros, used an
obsolete m5_ prefix, and used extern "C" in an odd way.

Change-Id: If38f9a1bca6fd4a4f7f533ddb1e81d6207bc9c44
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40878
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-10 20:02:11 +00:00
Gabe Black
41d934cf18 misc: Collapse all uses of DTRACE(x) to Debug::x.
Also mark the DTRACE macro as deprecated.

Change-Id: I99d9a9544b539117b375186e3e425d73d3c5cab7
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45009
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-10 20:00:48 +00:00
Giacomo Travaglini
35b6961dcb arch-arm: Fix SMM* instructions
A recent clean up patch [1] introduced some bugs in the instruction
implementation of:

SMMLA, SMMLAR, SMMLS, SMMLSR, SMMUL, SMMULR

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/42387

Change-Id: I459fe99bd2711e00027e9ef0c7796af7a374a509
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44945
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-10 09:08:44 +00:00
Gabe Black
072cddd765 base,arch,dev,mem: Always compile DPRINTFs, even if they're disabled.
The code in the body of a DPRINTF will always be compiled, even if it's
disabled. If TRACING_ON is false, the if around it will short circuit to
false without actually running any code to check the specified
condition, and the body of the if will be elided by the compiler as
unreachable code.

This creates a more consistent environment whether TRACING_ON is on or
not, so that variables which are only used in DPRINTF don't have to be
guarded by their own TRACING_ON #ifs at the call site. It also ensures
that the code inside DPRINTF is always checked to be valid code, even if
the DPRINTF itself will never go off. This helps avoid syntax errors,
etc, which aren't found because of the configuration of the build being
tested with.

Change-Id: Ia95ae229ebcd2fc9828f62e87f037f76b9279819
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44988
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-10 07:31:12 +00:00
Gabe Black
855fa77c3d arch-x86: Get rid of the now unused print(Src|Dest)Reg methods.
These would extract particular numbered source or destination registers
from an instruction and feed them into a printReg method. Now that the
register operands know how to print themselves with printReg directly,
these methods are no longer used.

Change-Id: I4244cb2ee97015f51f4783f377282e2a1db5d69b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42363
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-09 01:04:29 +00:00
Gabe Black
b5b123afa6 arch-x86: Move the step division helper out of the ISA desc.
Change-Id: I3c5714d6485c3b000561bdaa478c9393bc844bca
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42362
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-09 01:04:21 +00:00
Gabe Black
e25201b58d arch-x86: Use the new multiplication helpers in the mul uops.
Change-Id: Ib12b2e357fae19455a1a11dd890dda6602a6dc41
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42361
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-09 01:04:06 +00:00
Gabe Black
da649727f7 arch-x86: Make pick, signedPick and merge take indexes directly.
These methods had looked up the register index using an index into the
src or dest index arrays. This level of indirection is less efficient
than using the index itself (which we know already), and also requires
that the array is layed out like how we think it is.

Before:
array idx => reg idx => folded?
After:
reg idx => folded?

Change-Id: Ice2262250ff77582ba5530fc52e6738ba1bebe18
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42356
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-09 01:03:56 +00:00
Gabe Black
ae303671ec arch: Delete a few unused vector register types/constants.
These are used internally in ARM, but dummy versions of them were being
published by all ISAs even though nobody was consuming them.

Change-Id: I93d9e53c503e375a2f901bb6f7f4c00a7cdadb20
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42003
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 19:37:26 +00:00
Gabe Black
61ba9dab4d arch-x86: Specialize the remaining operand types for uops.
Change-Id: Ibe49b7fa020d3c722fe6f41cf83786dcfaf16819
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42355
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 10:49:58 +00:00
Gabe Black
6c62d6c7ee arch-x86: Create a separate type for floating point reg idxs.
This will ensure that floating point registers are used when required
and never otherwise.

Change-Id: I303c42d8a74c56b7b433b91fd36dc6aaf5ddef32
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42354
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 10:49:45 +00:00
Gabe Black
a1b4ce84f7 arch-x86: Eliminate the DependenceTags in registers.hh.
These were a weird holdover from when register indices were all squished
into a single scalar value, offset based on the register type. When that
change happened, the person who made it misunderstood what the
InstRegIndex type was for, and decided to build RegId into it for some
reason. The only purpose of InstRegIndex is to make sure everybody
agrees that the value being passed around is going to be used as a
register index and not a literal value, or vice versa. There is no type
associated with it as far as floating point, integer, or misc registers.
That gets applied at a different step, and actually can't be part of
InstRegIndex since the same base class may need to hold register indices
that are going to be treated as integer or floating point depending on
the subclass using them.

Also, since the values of the various constants in the DepdenceTags enum
where never actually added into register indices in the first place, the
code in the InstRegIndex constructor would never do anything. All
registers would be arbitrarily sorted into Int, FP, etc, and then when
they actually went to be used the category would be thrown away.

Change-Id: I8c4e8d6e9cdb53e298c00ad2f56e8c7304e51e96
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40339
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 10:49:26 +00:00
Gabe Black
b8d52fee57 arch-x86: Use regIdx() instead of creating an InstRegIndex directly.
The microcode assembler provides a regIdx() wrapper which will wrap
constants with an appropriate InstRegIndex constructor without having to
do so manually.

Change-Id: I782289bdfcbe4e3552ff44123dfce2ccc86f9266
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42353
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 04:41:00 +00:00
Gabe Black
39f76bb2b1 arch-x86: Style fixes and use uop args in the media ops.
Change-Id: I73b125888895acb74db16fc766af2571a73fb147
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42352
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 04:39:02 +00:00
Gabe Black
ef59d8504f arch-x86: Fix style and use uop args in seqop.isa.
Change-Id: I41ed7f0aa8dd00ed0f6f8361837945810d12bf9e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42351
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-08 04:38:41 +00:00