arch: Delete a few unused vector register types/constants.

These are used internally in ARM, but dummy versions of them were being
published by all ISAs even though nobody was consuming them.

Change-Id: I93d9e53c503e375a2f901bb6f7f4c00a7cdadb20
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42003
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/regs/vec.hh

@@ -59,9 +59,9 @@ using VecRegContainer =
     ::VecRegContainer<NumVecElemPerVecReg * sizeof(VecElem)>;
 
 using VecPredReg = ::VecPredRegT<VecElem, NumVecElemPerVecReg,
-                                 VecPredRegHasPackedRepr, false>;
+                                 false, false>;
 using ConstVecPredReg = ::VecPredRegT<VecElem, NumVecElemPerVecReg,
-                                      VecPredRegHasPackedRepr, true>;
+                                      false, true>;
 using VecPredRegContainer = VecPredReg::Container;
 
 // Vec, PredVec

src/arch/arm/types.hh

@@ -826,7 +826,6 @@ namespace ArmISA
 
     constexpr unsigned VecRegSizeBytes = MaxSveVecLenInBytes;
     constexpr unsigned VecPredRegSizeBits = MaxSveVecLenInBytes;
-    constexpr unsigned VecPredRegHasPackedRepr = false;
 } // namespace ArmISA
 
 #endif

src/arch/generic/vec_pred_reg.hh

@@ -38,9 +38,11 @@
 
 #include <array>
 #include <cassert>
+#include <cstdint>
+#include <string>
+#include <type_traits>
 #include <vector>
 
-#include "arch/generic/vec_reg.hh"
 #include "base/cprintf.hh"
 #include "sim/serialize_handlers.hh"
 
@@ -387,14 +389,7 @@ struct ShowParam<VecPredRegContainer<NumBits, Packed>>
 /// Dummy type aliases and constants for architectures that do not implement
 /// vector predicate registers.
 /// @{
-constexpr bool DummyVecPredRegHasPackedRepr = false;
-using DummyVecPredReg = VecPredRegT<DummyVecElem, DummyNumVecElemPerVecReg,
-                                    DummyVecPredRegHasPackedRepr, false>;
-using DummyConstVecPredReg = VecPredRegT<DummyVecElem,
-                                         DummyNumVecElemPerVecReg,
-                                         DummyVecPredRegHasPackedRepr, true>;
-using DummyVecPredRegContainer = DummyVecPredReg::Container;
-constexpr size_t DummyVecPredRegSizeBits = 8;
+using DummyVecPredRegContainer = VecPredRegContainer<8, false>;
 /// @}
 
 #endif  // __ARCH_GENERIC_VEC_PRED_REG_HH__

src/arch/generic/vec_reg.hh

@@ -264,8 +264,6 @@ using DummyVecElem = uint32_t;
 constexpr unsigned DummyNumVecElemPerVecReg = 2;
 using DummyVecRegContainer =
     VecRegContainer<DummyNumVecElemPerVecReg * sizeof(DummyVecElem)>;
-constexpr size_t DummyVecRegSizeBytes = DummyNumVecElemPerVecReg *
-    sizeof(DummyVecElem);
 /** @} */
 
 #endif /* __ARCH_GENERIC_VEC_REG_HH__ */

src/arch/mips/vecregs.hh

@@ -40,14 +40,9 @@ namespace MipsISA
 using VecElem = ::DummyVecElem;
 using VecRegContainer = ::DummyVecRegContainer;
 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
 
 // Not applicable to MIPS
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
 using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
 
 } // namespace MipsISA
 

src/arch/null/vecregs.hh

@@ -48,14 +48,9 @@ namespace NullISA
 using VecElem = ::DummyVecElem;
 using VecRegContainer = ::DummyVecRegContainer;
 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
 
 // Not applicable to null
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
 using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
 
 }
 

src/arch/power/vecregs.hh

@@ -41,14 +41,9 @@ namespace PowerISA
 using VecElem = ::DummyVecElem;
 using VecRegContainer = ::DummyVecRegContainer;
 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
 
 // Not applicable to Power
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
 using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
 
 } // namespace PowerISA
 

src/arch/riscv/vecregs.hh

@@ -58,14 +58,9 @@ namespace RiscvISA
 using VecElem = ::DummyVecElem;
 using VecRegContainer = ::DummyVecRegContainer;
 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
 
 // Not applicable to RISC-V
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
 using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
 
 }
 

src/arch/sparc/vecregs.hh

@@ -39,14 +39,9 @@ namespace SparcISA
 using VecElem = ::DummyVecElem;
 using VecRegContainer = ::DummyVecRegContainer;
 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
 
 // Not applicable to SPARC
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
 using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
 
 } // namespace SparcISA
 

src/arch/x86/vecregs.hh

@@ -53,14 +53,9 @@ namespace X86ISA
 using VecElem = ::DummyVecElem;
 using VecRegContainer = ::DummyVecRegContainer;
 constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
-constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
 
 // Not applicable to x86
-using VecPredReg = ::DummyVecPredReg;
-using ConstVecPredReg = ::DummyConstVecPredReg;
 using VecPredRegContainer = ::DummyVecPredRegContainer;
-constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
-constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
 
 } // namespace X86ISA