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arch-x86: Move the step division helper out of the ISA desc.

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Change-Id: I3c5714d6485c3b000561bdaa478c9393bc844bca
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42362
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Gabe Black
2021-03-05 23:42:01 -08:00
parent e25201b58d
commit b5b123afa6
3 changed files with 35 additions and 37 deletions
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30
src/arch/x86/insts/static_inst.cc
View File

@@ -119,6 +119,36 @@ X86StaticInst::printDestReg(std::ostream &os, int reg, int size) const
printReg(os, destRegIdx(reg), size);
}
void
X86StaticInst::divideStep(uint64_t dividend, uint64_t divisor,
uint64_t &quotient, uint64_t &remainder)
{
// Check for divide by zero.
assert(divisor != 0);
// If the divisor is bigger than the dividend, don't do anything.
if (divisor <= dividend) {
// Shift the divisor so it's msb lines up with the dividend.
int dividendMsb = findMsbSet(dividend);
int divisorMsb = findMsbSet(divisor);
int shift = dividendMsb - divisorMsb;
divisor <<= shift;
// Compute what we'll add to the quotient if the divisor isn't
// now larger than the dividend.
uint64_t quotientBit = 1;
quotientBit <<= shift;
// If we need to step back a bit (no pun intended) because the
// divisor got too to large, do that here. This is the "or two"
// part of one or two bit division.
if (divisor > dividend) {
quotientBit >>= 1;
divisor >>= 1;
}
// Decrement the remainder and increment the quotient.
quotient += quotientBit;
remainder -= divisor;
}
}
void
X86StaticInst::printReg(std::ostream &os, RegId reg, int size)
{

3
src/arch/x86/insts/static_inst.hh
View File

@@ -121,6 +121,9 @@ class X86StaticInst : public StaticInst
void printSrcReg(std::ostream &os, int reg, int size) const;
void printDestReg(std::ostream &os, int reg, int size) const;
static void divideStep(uint64_t divident, uint64_t divisor,
uint64_t &quotient, uint64_t &remainder);
static inline uint64_t
merge(uint64_t into, RegIndex index, uint64_t val, int size)
{

39
src/arch/x86/isa/microops/regop.isa
View File

@@ -133,9 +133,6 @@ def template MicroRegOpBranchTarget {{
}};
output header {{
void divide(uint64_t dividend, uint64_t divisor,
uint64_t &quotient, uint64_t &remainder);
enum SegmentSelectorCheck
{
SegNoCheck,
@@ -163,38 +160,6 @@ output header {{
};
}};
output decoder {{
void
divide(uint64_t dividend, uint64_t divisor,
uint64_t &quotient, uint64_t &remainder)
{
//Check for divide by zero.
assert(divisor != 0);
//If the divisor is bigger than the dividend, don't do anything.
if (divisor <= dividend) {
//Shift the divisor so it's msb lines up with the dividend.
int dividendMsb = findMsbSet(dividend);
int divisorMsb = findMsbSet(divisor);
int shift = dividendMsb - divisorMsb;
divisor <<= shift;
//Compute what we'll add to the quotient if the divisor isn't
//now larger than the dividend.
uint64_t quotientBit = 1;
quotientBit <<= shift;
//If we need to step back a bit (no pun intended) because the
//divisor got too to large, do that here. This is the "or two"
//part of one or two bit division.
if (divisor > dividend) {
quotientBit >>= 1;
divisor >>= 1;
}
//Decrement the remainder and increment the quotient.
quotient += quotientBit;
remainder -= divisor;
}
}
}};
let {{
# Make these empty strings so that concatenating onto
# them will always work.
@@ -681,7 +646,7 @@ let {{
if (divisor == 0) {
fault = std::make_shared<DivideError>();
} else {
divide(dividend, divisor, quotient, remainder);
divideStep(dividend, divisor, quotient, remainder);
//Record the final results.
Remainder = remainder;
Quotient = quotient;
@@ -736,7 +701,7 @@ let {{
}
remainder = dividend;
//Do the division.
divide(dividend, divisor, quotient, remainder);
divideStep(dividend, divisor, quotient, remainder);
}
}
//Keep track of how many bits there are still to pull in.