Commit Graph

17388 Commits

Author SHA1 Message Date
Hoa Nguyen
b79300bcac configs: Improve error message of missing files
In PathSearchFunc.__call__(), filename is the name of the file
while filepath contains the relative path to the missing file
relative to $M5_PATH.

Outputing the filepath in the error message makes the error
message more useful as it provides the expected location of
the file as well as the name of the file.

Change-Id: I5f1fdb9e48ac9ae59a26d33331a4a40bc9ff9acd
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45105
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-08 22:23:57 +00:00
Gabriel Busnot
40715206f4 mem-ruby: Fix RubySystem::functionalRead with partial data
Some protocol other than CHI require the read-write and/or read-only and/or
backing-store controller's buffers to be checked if the system is busy.

More details in issue GEM5-1000

Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46561
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-08 07:56:09 +00:00
Gabriel Busnot
9c2aac17b9 mem-ruby: Rename WriteMask::cmpMask to containsMask
Avoids confusion as the function tests for inclusions and not for equality.

Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46560
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Tiago Mück <tiago.muck@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-08 07:56:09 +00:00
Gabriel Busnot
5a5fb03c77 mem-ruby: Fix wrong test in CHI functional reads
A bad write mask inclusion test in CHI cache functionalRead and CHI data message
functionalRead was causing clean data not to be read in some cases. The issue is
detailed in issue GEM5-1002.

Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46559
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Tiago Mück <tiago.muck@arm.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-08 07:56:09 +00:00
Ayaz Akram
c290ead895 arch-riscv: Update the way a valid virtual address is computed
According to privileged ISA specs, a valid 64 bit virtual address should
have bit 63-39 same as bit 38 (for Sv39). Without this change, kernel page
fault handler does not seem to work correctly. For example, while running
a program, the kernel was segfaulting complaining that it cannot handle
kernel paging request at some virtual address (which is the faulting
address returned by gem5 currently, with all bits after first 39 cleared).
With this change, that error goes away.

Change-Id: Iae7c9d0af19e29214e14a0db08d7c0ac122122bc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45920
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Nils Asmussen <nils.asmussen@barkhauseninstitut.org>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-08 07:17:09 +00:00
Hoa Nguyen
cfa028291e util: Make sorted includes verifier less confusing
verifiers.py complains about unordered includes where there is
more than one empty line under the #include region, even if
the includes are sorted.

This change adds a note about the fact.

Change-Id: I7a8dbc12fd82db0f0cadcfec270e42f6e0de4aea
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46580
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-08 06:23:02 +00:00
Iru Cai
59879e3794 systemc: include <typeinfo>
GCC 11.1 complains about not finding std::type_info, which is in
header <typeinfo>.

Change-Id: I3b4352c8caeac73815f569911f47a7dfbddf23f3
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46399
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-07 01:29:32 +00:00
Iru Cai
90d56af474 dev: add a falsely removed if condition check in commit 03a00e5d3
Also add brackets at the if blocks near by.

This error is found by -Werror=misleading-indentation in GCC 11.1.

Change-Id: Ib9139b66411d0fd9424e027ba508cd556032389e
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44925
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-07 01:27:17 +00:00
Daniel R. Carvalho
2f8a8508fb util: Rename recently renamed namespaces
These namespaces were recently renamed, but the
renames were not applied here.

Change-Id: I3093f193e835f81e1beca538cbca6a0751f6c21b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46541
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-07 00:11:42 +00:00
Daniel R. Carvalho
89e36417d4 util,systemc: Fix create and params signature
These have been updated in src/, but were forgotten
here.

Change-Id: I19825f3f60d7ccd60282d5e7072c2f4c4959e7d8
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46540
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-07 00:11:42 +00:00
Daniel R. Carvalho
4e3eaa7d9d systemc: Fix module not found
Fix "ModuleNotFoundError: No module named 'SystemC'".

Change-Id: I81254a3ba2e221ecd81a6d879dc48ed528173964
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46539
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-07 00:11:42 +00:00
Arthur Perais
c01b9cd62b mem: Fix bandwidth-delay calculation in AMPM prefetcher
The AMPM paper (https://www.jilp.org/vol13/v13paper3.pdf) defines
the bandwidth-delay calculation as :

  Mbandwidth= (Nrequests/Tepoch)×Tlatency

In the code, Tepoch and Tlatency are in ticks (which is okay),
but Tepoch is converted from Cycles (256K) to Ticks using the
clockEdge(Cycle c) function, which is incorrect as it yields currentTick
+ c * clockPeriod() instead of just c * clockPeriod().
In other words, the divider keeps increasing as time advances.

This patch substitutes clockEdge() with cyclesToTicks() to keep
the epoch length (Tepoch) constant throughout simulation.

Change-Id: I69dee29892fa4b9eb8de8715fd72a535e122687f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46479
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-05 16:24:41 +00:00
Daniel R. Carvalho
31de35c8be mem-ruby: Appease compiler with return values
Add default values for the cases where gem5 panics to
appease the compiler.

Change-Id: Ib15a63abfb6f1ffed6ce628f52a57388d2173c44
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46320
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-04 20:36:22 +00:00
Daniel R. Carvalho
9ccd814418 cpu-kvm: Fix missing includes
"struct kvm_*" are declared in linux/kvm.h, and
were not being included nor forward declared in
the header file were it was being used.

Change-Id: I511bad19882450f8ecdd6b5efb687026d0fd94ca
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46321
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-04 20:36:22 +00:00
Bobby R. Bruce
cc8a1138c7 tests: Revert "Add sleep and debug to the jenkins ..."
This reverts
https://gem5-review.googlesource.com/c/public/gem5/+/45999.

This patch didn't yield any useful information, nor did the sleep fix
the issue. From communications with Google, the problem is with the
Kokoro service and is currently being fixed.

Change-Id: I301b470e6f8ed5adb2cc3c0a81590ae804ef750d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46419
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-04 20:24:43 +00:00
Bobby R. Bruce
554086389c tests,arch-arm: Replaced X86 clang fast build for ARM_MESI_THREE
Given ARM_MESI_THREE_Level_HTM is a superset of ARM, it is logical to
compile it with clang and with 'fast' compiler optimizations when
checking for errors. This increases our test coverage

Change-Id: I320291cd543e5db8f543edd81facc91f3f52e17b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38315
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-03 17:27:57 +00:00
Daniel R. Carvalho
fe27242f26 python: Fix include of pybind
The included file was not the correct one to get
the macro from, but the macro will use the original
file included.

Change-Id: I612f0d0b291cc2da8668c60471b7b78c7967ea5b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46319
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-03 13:45:10 +00:00
Gabe Black
9c6df1b55b fastmodel: Fix building with Fast Model.
Some build errors had crept in over time. This change fixes them.

Change-Id: I457d32190aa65b0ecd2d6de3f4f5d42d922ae5d5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46120
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-03 01:41:52 +00:00
Hoa Nguyen
b04bf8f729 configs: fix se.py error when using "--redirects"
Currently, the workload is initialized before host filesystem
redirections take place (i.e. before --redirects is taken into
account).

This change moves the initialization of the workload to the place
where the redirections have taken place.

JIRA: https://gem5.atlassian.net/browse/GEM5-1001

Change-Id: Id8f4c8486b4e0adb19ccc25d02d0c28cbf671063
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46099
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-02 19:50:10 +00:00
Arthur Perais
96f9372a81 cpu-o3: Prevent a mistarget from sending execution on an incorrect path
This fixes the unlikely but possible following case :

- Assume cond/uncond direct branch A jumping to next branch (PC + 4 in ARM). From
the point of view of the PCState object, the instruction is not branching
(PCState::branching() will return false since it tests whether nextPC != PC + 4 for ARM).
This gets cached in the BTB.

- Assume another cond branch B that is predicted taken but uses the PCState object of the
first branch A from the BTB due to a partial tag match (BTB is not fully tagged).

- At decode, the mistarget will be detected because the target given by the BTB does
not match the target encoded in the instruction B. However, to determine what PC to send to
fetch, decode looks at inst->pcState().branching(), which returns false because the PCState
object has PC X, and nextPC X + 4 (ARM case). Therefore, Decode sends the
fallthrough address of branch B, despite it being predicted taken. If the prediction is
correct, Exec will not realize that the target is wrong since it is the Decode stage's job.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-947

Change-Id: Ia3b960bb660bdfd3c348988d6532735fa3268990
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46260
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-02 09:57:04 +00:00
Yu-hsin Wang
51e8fd45e8 systemc: Set verify.py shebang to python3
Change-Id: Id33658c19f6ccfe5d1552599ad7928bae99784d4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45979
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-02 00:26:47 +00:00
Yu-hsin Wang
3aa64284b1 dev-arm: add ArmSigInterruptPin
ArmSigInterruptPin helps connecting ArmInterruptPin with general
interrupt pin.

Change-Id: I4235fa0714054079a111163caca8dd3985999095
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45266
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-02 00:19:51 +00:00
Arthur Perais
efc9a68620 mem: Fix Best Offset Prefetcher (BOP) learning phase code.
According to the DPC paper : "If the best score is less
than or equal to a fixed value BADSCORE, we turn prefetchoff
during the next phase"

However, the current code will turn prefetch off if the best
*offset* of the learning phase is less than BADSCORE, which
is incorrect.

Change-Id: Ib5790fe1341f2dd6328ec3b018bc52012e376723
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46259
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-01 19:36:20 +00:00
Arthur Perais
e2edde5cd5 cpu-o3: Prevent SW prefetches from forwarding from STQ
The store-to-load forwarding (STLDF) code will consider a SW prefetch hitting
on an older store as a succesful case of STLDF, which is incorrect as SW
prefetches do not return data, and eventually leads to an assert firing.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-934

Change-Id: I4c26f13642dc0b5101914109288614010f8f9978
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46261
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-01 19:27:06 +00:00
Daniel R. Carvalho
93e5734685 mem: Rename "memory" variables as "mem"
Pave the way to a "memory" namespace by renaming all
the variables that have a naming conflict.

Change-Id: I8327256ed88f1791225fe158f023132850303472
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45438
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
98ac080ec4 base-stats,misc: Rename Stats namespace as statistics
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Stats became ::statistics.

"statistics" was chosen over "stats" to avoid generating
conflicts with the already existing variables (there are
way too many "stats" in the codebase), which would make
this patch even more disturbing for the users.

Change-Id: If877b12d7dac356f86e3b3d941bf7558a4fd8719
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45421
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
fa505f1c23 cpu-minor: Rename Minor namespace as minor
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Minor became ::minor.

Change-Id: I408aa3d269ed7454ed0f488bd363d521602e58af
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45428
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
9f55bb8478 base: Rename Loader namespace as loader
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Loader became ::loader.

Change-Id: Ifddf11ab4d5d7358032fbc523bc923c0a9feedbd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45424
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
a658ea043f base,dev,mem-ruby: Rename m5 namespace as gem5
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::m5 became ::gem5.

Change-Id: I250b4354113fcd6005dc4144ae378552cb8f6717
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45437
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
c151239aa2 base,dev: Rename major and minor variables
Add a _version suffix. This is needed because there is
no cpu namespace yet.

Pave the way for a minor namespace.

Change-Id: Ic76415672f5421b838efc0913345c4b929e601f2
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45427
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
4dd099ba3d misc: Rename Enums namespace as enums
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Enums became ::enums.

Change-Id: I39b5fb48817ad16abbac92f6254284b37fc90c40
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45420
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
06fb0753fe base,dev,python: Rename Net namespace as networking
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Net became ::networking.

Change-Id: I6a77e36c84918174104e507453d53dfe3cb52d35
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45417
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
90aab2f926 sim: Rename ProbePoints namespace as probing
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ProbePoints became ::probing.

"probing" was chosen over "probe_points" because the
namespace contains more than solely probe points; it
contains all classes related to the act of probing.

Change-Id: I44567974a521707593739a2bd5933391803e5b51
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45412
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
e291376f07 cpu,mem: Rename ContextSwitchTaskId namespace
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ContextSwitchTaskId becomes ::context_switch_task_id.

Change-Id: If3884a5da7afe6144954d556b3b54f659bb7afb5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45411
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
df72e9d548 mem-cache: Rename Prefetcher namespace as prefetch
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Prefetcher became ::prefetcher.

"prefetch" was chosen over "prefetcher" to avoid generating
conflicts with the already existing variables. "prefetcher"
is a name that is expected to be more common in user's code
than "prefetch".

Change-Id: I8f07217f278a0229e05545b7847f2620ed208c66
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45410
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Gabe Black
b34d73af27 sim: Make PortProxy args in BaseBufferArg const ref.
That allows us to pass temporaries as the PortProxy arguments to these
functions. The thing behind the proxy may need to change, but the proxy
itself does not.

Change-Id: Ia9e09753b653107491cc12aa965e3662550208d1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45906
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-29 05:34:46 +00:00
Gabe Black
fc3e7214de cpu,fastmodel: Get rid of the unused ThreadContext::getPhysProxy.
Change-Id: I31abd77235310c8577c4281bbefaea57a25feb73
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45905
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 05:34:46 +00:00
Gabe Black
edc17fe9ec x86: Avoid including arch/x86/registers.hh.
Don't include arch/x86/registers.hh when other, local headers have the
actual information we need.

Change-Id: I9a7407475b04231ac84d9c5bb299915eadec3589
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40337
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 23:41:03 +00:00
Gabe Black
a91af24e60 misc: Clean up ISA switching header includes.
Remove includes that aren't needed, including ones for
config/the_isa.hh.

Also stop using switching includes when the ISA is known.

Change-Id: I2af6c88dcaf511b086ec808b0ba3196179982af2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40336
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 23:41:03 +00:00
Gabe Black
8ab9e72804 arch,base,cpu: Split arch/pcstate.hh out of arch/types.hh.
The only thing brought in by arch/types.hh is TheISA::PCState. Instead
of having the other types around where they could be used accidentally,
and to make it more obvious what's being exported, this change splits
PCState out into a new switching header called arch/pcstate.hh. The
original arch/types.hh is no longer a switching header, and includes
pcstate.hh.

Change-Id: I8dfd298349e4565f316f7b9a028703289ada6010
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40177
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 23:41:03 +00:00
Gabe Black
1cf41d4c54 arch-riscv: Split up read/write and read only CSR instructions.
If RS1 is X0 or if using an immediate and the value encoded in the RS1
field which is used as the immediate is zero, then the CSR is not
actually written. It doesn't matter whether the register value would
change or not.

Also, if an instruction wants to write to the CSR, the manual does not
say anything about whether or not the register value changes. If a
register is read only, attempting to write it with *any* value should be
illegal.

Change-Id: Ic876eff0fc0c7e25a40ba9213e3c3e49bfa7a33e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45522
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 23:25:13 +00:00
Daniel R. Carvalho
2a0e4ae3ea mem-cache: Rename Encoder namespace as encoder
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

compression::Encoder became compression::encoder.

Change-Id: I3ff2693fbbfc366952cf0f03414a00debae27635
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45408
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-28 23:01:26 +00:00
Daniel R. Carvalho
c84888b67a mem-cache: Rename encoder variables as indexEncoder
Pave the way for an encoder namespace.

Change-Id: I5b55ac18a2973e25e53b097cd407861f5f60d646
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45407
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-28 23:01:26 +00:00
Daniel R. Carvalho
495f0cb63d mem-cache: Rename Compressor namespace as compression
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Compressor became ::compression.

"compression" was chosen over "compressor" to avoid
generating conflicts with the already existing variables,
as well as because the namespace contains more than solely
compressors (e.g., encoders).

Change-Id: I7054845984784b0dffcc4fb90d66c5096a64194d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45406
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 23:01:26 +00:00
Gabe Black
d9bda9c2be cpu,fastmodel: Get rid of unused (read|set)FuncExeInst.
These zombie methods were plumbed around and looked like they might do
something, but nothing actually uses them.

Change-Id: I1e85669202e2ecb10370e6c6eb8364eb47085cf3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45919
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-05-28 18:51:55 +00:00
Gabe Black
d583a9a227 arch: Template the generic PC types on the instruction width.
These had been templated on a type, and then the width of that type was
considered the amount the PC should advance when executing straight line
code. That type was MachInst, which was loosely the size of an
instruction, but was practically whatever sized data type was fed into
the decoder at a time.

Instead of tying this to a type, this change moves it over to be a
simple number. This avoids a level of indirection, and also further
decouples the type the decoder might use as input from the instruction
size.

Change-Id: I797876a33d27e759c7a6e23a658179201fabfa47
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40176
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-28 18:51:04 +00:00
Gabe Black
e555fedf96 arch: Eliminate the now unused remote_gdb.hh switching header.
Change-Id: Ideb04254a65670350d319c2273539d8bc9e48d70
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44620
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 07:56:19 +00:00
Gabe Black
9f547559d8 arch,base,sim: Move GDB stub creation into the arch Workloads.
These classes know what flavor of GDB stub they want, so there's no need
for TheISA:: to multiplex.

Change-Id: Ia428fe391719a3320d865421fc59352a17875bcf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44619
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 07:56:19 +00:00
Gabe Black
b6d4e871ef arch,base,sim: Construct the GDB stub with no threads.
By moving the installation of even the first ThreadContext out of the
constructor, it's possible to construct the stub separately. We can then
move the code that creates the stub out of the base class and into
architecture specific sub-classes.

Change-Id: I0dfd53a3135ebc98ec49acf81d83e58830bc365c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44618
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 07:56:19 +00:00
Gabe Black
2c75e58cac sim,cpu: Move the remote GDB stub into the workload.
There are two user visible effects of this change. First, all of the
threads for a particular workload are moved under a single GDB instance.
The GDB session can see all the threads at once, and can let you move
between them as you want.

Second, since there is a GDB instance per workload and not per CPU, the
wait_for_gdb parameter was moved to the workload.

Change-Id: I510410c3cbb56e445b0fbb1def94c769d3a7b2e3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44617
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 07:56:19 +00:00