96f9372a81
This fixes the unlikely but possible following case : - Assume cond/uncond direct branch A jumping to next branch (PC + 4 in ARM). From the point of view of the PCState object, the instruction is not branching (PCState::branching() will return false since it tests whether nextPC != PC + 4 for ARM). This gets cached in the BTB. - Assume another cond branch B that is predicted taken but uses the PCState object of the first branch A from the BTB due to a partial tag match (BTB is not fully tagged). - At decode, the mistarget will be detected because the target given by the BTB does not match the target encoded in the instruction B. However, to determine what PC to send to fetch, decode looks at inst->pcState().branching(), which returns false because the PCState object has PC X, and nextPC X + 4 (ARM case). Therefore, Decode sends the fallthrough address of branch B, despite it being predicted taken. If the prediction is correct, Exec will not realize that the target is wrong since it is the Decode stage's job. Jira Issue: https://gem5.atlassian.net/browse/GEM5-947 Change-Id: Ia3b960bb660bdfd3c348988d6532735fa3268990 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46260 Reviewed-by: Nathanael Premillieu <nathanael.premillieu@huawei.com> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com>
This is the gem5 simulator. The main website can be found at http://www.gem5.org A good starting point is http://www.gem5.org/about, and for more information about building the simulator and getting started please see http://www.gem5.org/documentation and http://www.gem5.org/documentation/learning_gem5/introduction. To build gem5, you will need the following software: g++ or clang, Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4, and lastly protobuf if you want trace capture and playback support. Please see http://www.gem5.org/documentation/general_docs/building for more details concerning the minimum versions of the aforementioned tools. Once you have all dependencies resolved, type 'scons build/<ARCH>/gem5.opt' where ARCH is one of ARM, NULL, MIPS, POWER, SPARC, or X86. This will build an optimized version of the gem5 binary (gem5.opt) for the the specified architecture. See http://www.gem5.org/documentation/general_docs/building for more details and options. The basic source release includes these subdirectories: - configs: example simulation configuration scripts - ext: less-common external packages needed to build gem5 - src: source code of the gem5 simulator - system: source for some optional system software for simulated systems - tests: regression tests - util: useful utility programs and files To run full-system simulations, you will need compiled system firmware (console and PALcode for Alpha), kernel binaries and one or more disk images. If you have questions, please send mail to gem5-users@gem5.org Enjoy using gem5 and please share your modifications and extensions.