303281a5f3
Fix PDXP length in HBM3
2025-07-22 13:48:57 +02:00
812b540ed5
Make DRAMPower required again
...
DRAMPower was only optional because the linker had problems when
integrating with gem5 as there still exists a very old version in the
source tree.
With the new namespaces, there is no longer a need for making DRAMPower
optional.
2025-05-09 16:45:54 +02:00
marcomoerz
4120e9c35b
Integrate DRAMUtils and new DRAMPower
2025-05-09 16:45:54 +02:00
Lukas Steiner
0f2be6ece5
Merge branch 'fix/lpddr5_ref' into 'develop'
...
Fix LPDDR5 AllBank and Per2Bank Refresh
See merge request ems/astdm/modeling.dram/dram.sys.5!114
2025-04-24 14:07:59 +00:00
8268f2e33b
Fix issue with REFP2B with multiple ranks
2025-04-08 12:39:38 +02:00
db615eb6a4
Fix LPDDR5 AllBank and Per2Bank Refresh
2025-03-26 15:10:56 +01:00
7431f79ac3
Use proprietary license text in extension files
2025-02-21 15:11:37 +01:00
7a8633d36e
Implement stack ID for HBM3
2025-01-13 15:36:05 +01:00
ed709b82d4
Integrate new Timing Checker
2025-01-13 10:24:08 +01:00
6d6c8c595f
Clean up private/public linking
2024-12-20 17:40:16 +01:00
ca9ef16d0d
Remove unnecessary project() calls
...
project() should only be called if the subdirectory, in fact, can be
built standalone.
2024-12-20 17:40:15 +01:00
a37171c6fd
Remove file globs from CMakeLists
...
Fix build
2024-12-20 17:40:15 +01:00
e409bab47a
Implement pseudo-channel and rank specific BW information
2024-11-18 13:18:33 +01:00
e74a617273
Crude fix for bandwidth calculations with pseudo-channels
2024-11-15 15:57:37 +01:00
e21b051fb5
Fix compilation errors on some systems
2024-09-09 11:29:39 +02:00
82027bfa83
Move Trace Analyzer to open source tree
...
Move the code for the Trace Analyzer to the open source tree and only
keep the extensions behind a compiler flag.
2024-07-18 10:13:25 +02:00
Lukas Steiner
cfd980373b
Merge branch 'third-party' into 'develop'
...
Add notice file for all used third party work
See merge request ems/astdm/modeling.dram/dram.sys.5!69
2024-07-18 07:52:26 +00:00
Lukas Steiner
5a90c017d9
Fix wrong command dependency.
2024-07-05 08:11:39 +00:00
f70c813140
Add notice file for all used third party work
2024-06-20 11:48:54 +02:00
12bfba1fb3
Fix various bugs
...
- Fix data race for some tests by disabling database recording
- Fix undefined behaviour in configuration test
- Port clkMhz to tCK for simulation script
- Port memUtil Python script to tCK with backwards compatibility
2024-02-26 09:58:19 +01:00
454cb00ddb
Refactor: remove monolithic configuration class
2024-02-23 11:54:51 +01:00
Lukas Steiner
0b88161640
Merge branch 'DramCleanup' into 'develop'
...
Introduce method to convert memspecs to DRAMPower memspecs and cleanup source files
See merge request ems/astdm/modeling.dram/dram.sys.5!58
2023-11-16 13:25:16 +00:00
6645a9ed54
Introduce method to convert memspecs to DRAMPower memspecs and cleanup source files
2023-11-14 14:57:25 +01:00
3481703e6e
Fix a bug where plotting failed with more than 1 thread
2023-11-07 09:50:10 +01:00
Lukas Steiner
5226b87a78
Merge branch 'fix_pyhton_scripts' into 'develop'
...
Numerous fixes for Python scripts
See merge request ems/astdm/modeling.dram/dram.sys.5!52
2023-10-20 07:52:26 +00:00
d2761ce060
Numerous fixes for Python scripts
2023-10-12 11:58:18 +02:00
d2e5bd36de
Fix all warnings
2023-09-22 10:45:23 +02:00
Lukas Steiner
8224e97abe
Reformat all files.
2023-09-21 16:50:59 +02:00
f518ba883f
Fix PseudoChannel issue in TA
2023-09-21 09:22:28 +02:00
c07d09f392
Format all files
2023-08-29 09:26:25 +02:00
Lukas Steiner
12f2b73cde
Additional check of byte enable pointer.
2023-08-23 15:21:53 +02:00
Lukas Steiner
76e58b1755
Fix renaming.
2023-08-23 13:50:10 +02:00
Lukas Steiner
0f824e8b92
Do not allow masked write in default case.
2023-08-23 11:41:58 +02:00
Lukas Steiner
8c248e8e23
Remove masked write checks for HBM3.
2023-08-23 10:40:41 +02:00
a539e3c011
Merge branch 'develop' into work/partial_writes
2023-08-23 09:31:42 +02:00
4548d20b6e
Rename requiresMaskedWrite to requiresReadModifyWrite
2023-08-21 10:55:41 +02:00
c0f1b2f6a3
Add check to prevent masked writes in HBM3
2023-08-21 10:52:44 +02:00
a0f93a75e2
Merge develop
2023-08-21 10:01:08 +02:00
b3937cf63a
Add LPDDR5 Partial Write Support
2023-08-16 11:42:39 +02:00
09275bb789
Add support for MWR and MWRA to TraceAnalyzer
2023-08-16 09:38:57 +02:00
c5f1320399
Implement Partial Write for DDR5
2023-08-16 09:38:57 +02:00
40dbc518b6
Add hack in TimingCheckers to convert MWR to WR in insertion stage
2023-08-16 09:38:54 +02:00
f7066a22b0
First implementation of Partial Writes
2023-08-16 09:38:54 +02:00
Lukas Steiner
a8d15e35a5
Merge branch 'work/regression_tests' into 'develop'
...
Add a regression test for every standard
See merge request ems/astdm/modeling.dram/dram.sys.5!34
2023-08-15 12:00:48 +00:00
Lukas Steiner
5598d53ebd
Merge branch 'cmake_debug' into 'develop'
...
Disable CMake diagnostics print
See merge request ems/astdm/modeling.dram/dram.sys.5!40
2023-08-15 09:28:28 +00:00
81eaccf3d6
Add lastCommandOn{C,R}asBus != scMaxTime check for HBM2 and HBM3
2023-08-15 10:58:10 +02:00
Lukas Steiner
56c9f5f5f0
Merge branch 'initialize_generalinfotable' into 'develop'
...
Write GeneralInfo table at the beginning
See merge request ems/astdm/modeling.dram/dram.sys.5!39
2023-08-14 13:33:40 +00:00
Lukas Steiner
cb9689a08d
Merge branch 'work/simulator_library' into 'develop'
...
Introduce Simulator class
See merge request ems/astdm/modeling.dram/dram.sys.5!35
2023-08-10 12:19:33 +00:00
ccc1bc73c4
Disable CMake diagnostics print
2023-08-09 14:57:29 +02:00
d392d0ab98
Write GeneralInfo table at the beginning
...
and do not include information in it that is only known at the end of
the simulation. These can trivially be calculated by the trace itself
and would be redundant information regardless.
The TraceAnalyzer gets the number of transactions and the length of
the trace by additional SQL queries.
This enables us to inspect traces of simulations that were aborted
without finishing cleanlywithout finishing cleanly.
2023-08-09 11:55:10 +02:00
