derek/gem5
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
bb8f370e4d36ada08afa82e51d4b3b934bf105c7
gem5/src/arch/mips
History
Sascha Bischoff fed81f3408 arch,cpu: Add boilerplate support for matrix registers 
We add initial support for matrix registers to the CPU models and add
stubs in each architecture. There are no implementations of matrix
registers added, but this provides the basic support for using them in
the future.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1289

Change-Id: I2ca6a21da932a58a801a0d08f0ad0cdca4968d02
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/64333
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2023-01-17 10:09:56 +00:00
..
gdb-xml
scons: Use tags to gate ISA files and not env['TARGET_ISA'].
2021-10-19 20:41:03 +00:00
isa
misc: Replace namespace Trace with lowercase trace
2022-10-02 16:30:15 +00:00
linux
misc: Remove the Linux namespace
2023-01-17 09:16:20 +00:00
regs
cpu,arch: Put the name of the RegClass into the RegClass.
2022-07-29 19:30:51 +00:00
decoder.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
decoder.hh
arch: Make the (read|set)MiscReg methods virtual.
2022-08-20 01:15:23 +00:00
dsp.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
dsp.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
dt_constants.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
faults.cc
arch-mips: Convert float, int, and misc regs.
2022-06-19 07:20:34 +00:00
faults.hh
arch-mips: Convert float, int, and misc regs.
2022-06-19 07:20:34 +00:00
idle_event.cc
misc: Remove lingering uses of TheISA::.
2022-08-20 07:30:16 +00:00
idle_event.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
interrupts.cc
arch-mips: Convert float, int, and misc regs.
2022-06-19 07:20:34 +00:00
interrupts.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
isa.cc
arch,cpu: Add boilerplate support for matrix registers
2023-01-17 10:09:56 +00:00
isa.hh
arch: Make the (read|set)MiscReg methods virtual.
2022-08-20 01:15:23 +00:00
MipsCPU.py
arch-mips,cpu-minor: Add MinorCPU to MIPS ISA
2022-08-26 18:37:48 +00:00
MipsDecoder.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
MipsInterrupts.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
MipsISA.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
MipsMMU.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
MipsSeWorkload.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
MipsTLB.py
python: Apply Black formatter to Python files
2022-08-03 09:10:41 +00:00
mmu.hh
arch: Make the MMU ranged translateFunction pure virtual.
2021-10-22 21:43:02 +00:00
mt_constants.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
mt.hh
arch: Minimize use of RegClassType constants and the RegId constructor.
2022-07-27 10:59:07 +00:00
page_size.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pagetable.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
pcstate.hh
arch,cpu: Rename arch/generic/types.hh to pcstate.hh.
2021-08-04 04:15:21 +00:00
pra_constants.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
process.cc
arch-mips: Convert float, int, and misc regs.
2022-06-19 07:20:34 +00:00
process.hh
base: Remove the Loader namespace
2023-01-17 09:16:20 +00:00
remote_gdb.cc
arch: Minimize use of RegClassType constants and the RegId constructor.
2022-07-27 10:59:07 +00:00
remote_gdb.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
SConscript
arch: Decentralize the arch tag TagImplies in arch/SConscript.
2022-09-02 10:20:51 +00:00
SConsopts
misc: Replace TARGET_ISA with USE_${ISA} variables.
2022-09-02 10:20:51 +00:00
se_workload.cc
arch: Switch the generic register ABI over to use RegId.
2022-06-19 07:48:14 +00:00
se_workload.hh
sim,arch: Remove the GuestABI namespace
2023-01-17 09:16:20 +00:00
stacktrace.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
tlb.cc
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
tlb.hh
misc: Move Mode and Translation from BaseTLB to BaseMMU
2021-07-07 08:44:13 +00:00
types.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
utility.cc
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00
utility.hh
misc: Adopt the gem5 namespace
2021-07-01 19:08:24 +00:00