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arch-mips,cpu-minor: Add MinorCPU to MIPS ISA

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While it may not be well supported, it's better to incorporate the
MinorCPU into the MIPS ISA gem5 binary than leave it out.

Change-Id: If44aa0531f287f4c3d8789c54025c7bb5259586a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/61536
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Bobby R. Bruce
2022-07-20 14:42:00 -07:00
committed by Bobby Bruce
parent b2fee855d8
commit 840e030db3
1 changed files with 5 additions and 0 deletions
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5
src/arch/mips/MipsCPU.py
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@@ -27,6 +27,7 @@ from m5.objects.BaseAtomicSimpleCPU import BaseAtomicSimpleCPU
from m5.objects.BaseNonCachingSimpleCPU import BaseNonCachingSimpleCPU
from m5.objects.BaseTimingSimpleCPU import BaseTimingSimpleCPU
from m5.objects.BaseO3CPU import BaseO3CPU
from m5.objects.BaseMinorCPU import BaseMinorCPU
from m5.objects.MipsDecoder import MipsDecoder
from m5.objects.MipsMMU import MipsMMU
from m5.objects.MipsInterrupts import MipsInterrupts
@@ -54,3 +55,7 @@ class MipsTimingSimpleCPU(BaseTimingSimpleCPU, MipsCPU):
class MipsO3CPU(BaseO3CPU, MipsCPU):
mmu = MipsMMU()
class MipsMinorCPU(BaseMinorCPU, MipsCPU):
mmu = MipsMMU()