From 840e030db378b2bbc691d357bdd30bebbb01a224 Mon Sep 17 00:00:00 2001 From: "Bobby R. Bruce" Date: Wed, 20 Jul 2022 14:42:00 -0700 Subject: [PATCH] arch-mips,cpu-minor: Add MinorCPU to MIPS ISA While it may not be well supported, it's better to incorporate the MinorCPU into the MIPS ISA gem5 binary than leave it out. Change-Id: If44aa0531f287f4c3d8789c54025c7bb5259586a Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/61536 Reviewed-by: Bobby Bruce Maintainer: Bobby Bruce Tested-by: kokoro --- src/arch/mips/MipsCPU.py | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/arch/mips/MipsCPU.py b/src/arch/mips/MipsCPU.py index 797ec4006e..53b134ad79 100644 --- a/src/arch/mips/MipsCPU.py +++ b/src/arch/mips/MipsCPU.py @@ -27,6 +27,7 @@ from m5.objects.BaseAtomicSimpleCPU import BaseAtomicSimpleCPU from m5.objects.BaseNonCachingSimpleCPU import BaseNonCachingSimpleCPU from m5.objects.BaseTimingSimpleCPU import BaseTimingSimpleCPU from m5.objects.BaseO3CPU import BaseO3CPU +from m5.objects.BaseMinorCPU import BaseMinorCPU from m5.objects.MipsDecoder import MipsDecoder from m5.objects.MipsMMU import MipsMMU from m5.objects.MipsInterrupts import MipsInterrupts @@ -54,3 +55,7 @@ class MipsTimingSimpleCPU(BaseTimingSimpleCPU, MipsCPU): class MipsO3CPU(BaseO3CPU, MipsCPU): mmu = MipsMMU() + + +class MipsMinorCPU(BaseMinorCPU, MipsCPU): + mmu = MipsMMU()