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  • 55c58da504 base: Convert doGzipLoad to use std::string instead of *char Bobby R. Bruce 2024-03-27 12:21:42 -07:00
  • 294dd6dd01 util-m5: Add default M5OP_ADDR to arm64 Hoa Nguyen 2024-03-28 21:05:58 +00:00
  • 63706f04b5 dev: Remove duplicate virtio files (#976) Giacomo Travaglini 2024-03-28 14:32:11 +00:00
  • 896c32cd0d arch: Add getIsaName in BaseISA (#975) Yu-Cheng Chang 2024-03-28 21:27:32 +08:00
  • 42fb1d657c stdlib: Add DTB generation capabilites to AbstractCacheHierarchy Giacomo Travaglini 2024-03-25 16:32:31 +00:00
  • be1cac6c21 stdlib: Use newly defined tree for PrivateL1PrivateL2 hierarchy Giacomo Travaglini 2024-03-18 09:33:42 +00:00
  • 1664625c91 stdlib: Add tree structure to the AbstractCacheHierarchy Giacomo Travaglini 2024-03-19 10:34:10 +00:00
  • 9ab97c8930 mem-cache: Move partitioningPolicies to the PartitionManager Giacomo Travaglini 2024-03-12 15:04:15 +00:00
  • d0539fe7cb mem-cache: Define a PartitionManager to handle partitioning Giacomo Travaglini 2024-03-12 13:54:59 +00:00
  • c91d1253de cpu: This commit updates cpu FUs according to new Simd types Ivan Fernandez 2024-02-28 12:26:14 +01:00
  • aa24c9010f arch-riscv: This commit adds new instruction types to RISC-V Ivan Fernandez 2023-11-06 17:39:50 +01:00
  • 274795c6ee arch-arm: This commit fixes two RISC-V inst types used in SVE Ivan Fernandez 2024-02-28 10:10:29 +01:00
  • dd5a30d41e sim-se,cpu-kvm: Fix SE workload setup on KVM CPUs (#956) Carson Molder 2024-03-23 17:15:11 -05:00
  • 8249fa8dee base: Fix 'doGzipLoad' str manipulation Bobby R. Bruce 2024-03-23 14:22:12 -07:00
  • 1e743fd85a arch-riscv: adding vector unit-stride segment stores to RISC-V (#913) Ivan Fernandez 2024-03-22 23:45:58 +01:00
  • 5d49970ac7 Wallclock time plots PIM Derek Christ 2024-03-22 18:42:18 +01:00
  • 7d62da6d10 dev-amdgpu: Support for ROCm 6.0 (#926) Matthew Poremba 2024-03-21 21:12:09 -07:00
  • dca040983b arch-vega: Various vega fixes to enable nanogpt (#950) Matthew Poremba 2024-03-21 21:11:44 -07:00
  • 803dbbfdac arch-vega: Implement flat_load_sbyte instruction (#953) Michael Boyer 2024-03-21 21:11:10 -07:00
  • 76965c6431 tests: Update tests to use specific resource versions (#901) Harshil Patel 2024-03-21 09:03:46 -07:00
  • 4c33397592 misc: Add ".DS_Store" to .gitignore (#952) Bobby R. Bruce 2024-03-21 08:40:44 -07:00
  • 823b5a6eb8 dev-amdgpu: Support multiple CPs and MMIO AddrRanges Matthew Poremba 2024-02-13 17:43:23 -06:00
  • 39153cd234 dev-amdgpu: Implement PCIe indirect read/write Matthew Poremba 2024-02-13 17:38:20 -06:00
  • 047c194780 dev-amdgpu: Implement SRBM write Matthew Poremba 2024-02-13 16:45:12 -06:00
  • 6bbde8fbb8 dev-amdgpu: Rework handling of unknown registers Matthew Poremba 2024-02-08 12:26:27 -06:00
  • 009cec56e0 dev-amdgpu: Check for SDMA copies to GART range Matthew Poremba 2024-02-07 13:29:44 -06:00
  • 998709d4fc dev-amdgpu: Improve PM4 write data packet Matthew Poremba 2024-02-07 13:27:30 -06:00
  • c045c68540 dev-amdgpu: Add node_id to interrupt handler Matthew Poremba 2024-02-13 16:39:50 -06:00
  • 9ab004cccc arch-vega: Implement V_LSHL_ADD_U64 Matthew Poremba 2024-02-13 16:34:05 -06:00
  • f36be791aa arch-vega: Expand FLAT subDecode range in main decoder Matthew Poremba 2024-02-13 16:27:55 -06:00
  • acd9d3ff94 gpu-compute: Add support for skipping GPU kernels (#940) Michael Boyer 2024-03-21 07:46:27 -07:00
  • e02f329d5d arch-vega: Fix VOP3 decode table off-by-one Matthew Poremba 2024-03-20 16:41:31 -05:00
  • 457d97ea52 arch-vega: Implement V_XNOR_B32 Matthew Poremba 2024-03-15 18:28:36 -05:00
  • 1b15b2cc4b arch-vega: Support negative modifiers for packed F32 math Matthew Poremba 2024-03-20 10:00:52 -05:00
  • 3f8d0e1ef8 arch-vega: Fix V_FMAC_F32 data type Matthew Poremba 2024-03-18 19:02:10 -05:00
  • ba2f5615ba gpu-compute: Support cache line sizes >64B in GPUFS (#939) Michael Boyer 2024-03-20 11:09:25 -07:00
  • 2b67d0eba6 stdlib, tests, configs: Add a new PrivateL1PrivateL2WalkCache hierarchy (#935) Giacomo Travaglini 2024-03-19 09:04:32 +00:00
  • dbae09e4d9 arch-riscv: Move alignment check to Physical Memory Attribute(PMA) (#914) Yu-Cheng Chang 2024-03-19 03:59:13 +08:00
  • 84da503d37 mem: Fix callback of functional access in port wrapper (#938) Yan Lee 2024-03-18 23:21:43 +08:00
  • 058dd7e195 configs, tests: Amend stdlib configs to use WalkCache hierarchy Giacomo Travaglini 2024-03-14 15:15:46 +00:00
  • d32a438913 stdlib: Add a new private_l1_private_l2_walk_cache_hierarchy.py module Giacomo Travaglini 2024-03-14 14:42:25 +00:00
  • 0b45be7720 arch-riscv: define size_t and off_t for 32 bit Robert Hauser 2024-03-16 09:09:57 +00:00
  • 0fc08acf92 sim: add whitespace for correct coding style Robert Hauser 2024-03-16 09:07:38 +00:00
  • f7da70bd10 arch-riscv,sim: simplify templates for GuestAddr Robert Hauser 2024-03-16 09:05:30 +00:00
  • e3fd3d7775 arch-arm,sim: fix argument handling for GuestAddr Robert Hauser 2024-03-16 09:04:51 +00:00
  • bf63ec953a arch-riscv: revert SyscallABI32 changes Robert Hauser 2024-03-16 09:04:36 +00:00
  • 0ec8cf8d05 dev-arm: Fix SMMUv3 DTB autogen (#934) Giacomo Travaglini 2024-03-14 15:42:57 +00:00
  • 6f90feca56 build(deps): bump cryptography from 42.0.0 to 42.0.4 in /util/gem5-resources-manager (#929) dependabot[bot] 2024-03-11 20:50:29 -07:00
  • e8bc4fc137 misc: Sync stable .github dir with develop (#928) Bobby R. Bruce 2024-03-11 12:35:35 -07:00
  • 85a20773c7 misc: Fix weekly tests (#924) Ivana Mitrovic 2024-03-11 11:08:30 -07:00
  • 3d2d960f10 arch-riscv: fix return value of pseudo instruction Robert Hauser 2024-03-11 15:32:15 +00:00
  • 942979162a READ_MODIFY_WRITE flag fix (#922) Tiago Mück 2024-03-11 10:32:11 -05:00
  • d358813a7a arch-riscv: fix argument handling of syscalls in SE mode Robert Hauser 2024-03-11 15:28:23 +00:00
  • de52f3614c sim: enable pseudo instructions with varying pointer size Robert Hauser 2024-03-11 15:27:58 +00:00
  • 1f0075bdbd misc: Remove incorrect 'working-directory' in Weekly tests Bobby R. Bruce 2024-03-11 06:09:47 -07:00
  • 2bec61e69a misc: Revert download-artifact v4 to v3 Bobby R. Bruce 2024-03-11 05:59:37 -07:00
  • bbde68c08c dev-arm: Handle translation aborts and add IRQ support to the SMMU (#920) Giacomo Travaglini 2024-03-08 18:27:35 +00:00
  • 5161195db5 dev-arm: Remove the SMMUv3 irq_interface_enable parameter Giacomo Travaglini 2024-03-05 13:42:16 +00:00
  • d63282a9da dev-arm: Implement wired interrupt for SMMU event queue Giacomo Travaglini 2024-02-29 15:34:16 +00:00
  • 63c815b5fc dev-arm: Do not panic in the SMMUv3 for fauting transactions Giacomo Travaglini 2024-03-05 15:57:43 +00:00
  • 7d5d1cd9c8 dev-arm: Rewrite SMMUEvent Giacomo Travaglini 2024-03-05 16:25:53 +00:00
  • ef10db5a3e dev-arm: Record additional information in the TranslResult Giacomo Travaglini 2024-03-05 18:19:56 +00:00
  • 3d1f68f205 dev-arm: Return translation fault in doReadCD Giacomo Travaglini 2024-03-06 11:57:51 +00:00
  • 4a4b775985 dev-arm: Provide encapsulation by adding TranslResult::isFaulting Giacomo Travaglini 2024-03-05 17:57:45 +00:00
  • f70dc88c8a build(deps): bump cryptography from 39.0.2 to 42.0.0 in /util/gem5-resources-manager (#853) dependabot[bot] 2024-03-07 08:14:14 -08:00
  • f35815cd48 misc: bump pre-commit from 3.6.0 to 3.6.2 (#905) dependabot[bot] 2024-03-06 14:20:42 -08:00
  • ceee8fed29 misc: bump tqdm from 4.66.1 to 4.66.2 (#906) dependabot[bot] 2024-03-06 14:20:03 -08:00
  • f6c61836b3 arch-riscv: adding vector unit-stride segment loads to RISC-V (#851) Ivan Fernandez 2024-03-06 20:27:06 +01:00
  • b930c57d54 misc: Tag checkpoints with the ISA of the CPUs (#908) Giacomo Travaglini 2024-03-05 10:04:06 +00:00
  • 650b92124b misc: Copy the develop .github dir to stable (#912) Bobby R. Bruce 2024-03-05 08:35:11 +00:00
  • 5bce5673b0 util: Fix recent cpt_upgraders not checking for ISA Giacomo Travaglini 2024-02-15 17:39:04 +00:00
  • 3d2052bc03 misc: Serialize the ISA as a string in the checkpoint Giacomo Travaglini 2024-02-15 15:51:37 +00:00
  • 676d571009 arch-riscv: adding stats to show completed page walks (#869) Nitish Arya 2024-03-04 17:38:28 +01:00
  • c57a6b0d59 mem-cache: Add support for partitioning caches (#765) Giacomo Travaglini 2024-03-04 09:44:01 +00:00
  • c1d5ffe7c7 mem-cache: Prefetchers Improvements (#872) Giacomo Travaglini 2024-03-04 09:09:47 +00:00
  • fae5f5e00b sim-se: Catch None value if binary is not compatible with gem5 (#903) Ivana Mitrovic 2024-03-01 16:41:18 -08:00
  • 61adfa38b2 stdlib: Fix initialization for self.pic.hart_config in lupv_board (#904) Ivana Mitrovic 2024-03-01 11:25:00 -08:00
  • c0e5d58a96 dev: RegisterBank addRegistersAt for fragmented reg banks (#902) Giacomo Travaglini 2024-03-01 15:32:40 +00:00
  • 27c8355565 mem-cache: Add support for partitioning caches Hristo Belchev 2023-12-13 14:27:53 +00:00
  • 9bd71bff0c python: Adding fatal statement to notify user mistakes. (#826) Mahyar Samani 2024-02-29 10:47:26 -08:00
  • db42aeb630 arch-vega: Implement accumulation offset (#895) Matthew Poremba 2024-02-29 09:05:39 -08:00
  • 69762e272e sim-se, arch-x86: initialize max stack size from parameter (#892) Nicholas Mosier 2024-02-29 08:15:43 -08:00
  • 0d79b5098b Increased packets sanity check limit to 1024 (#797) amatabsc 2024-02-29 17:12:59 +01:00
  • 777ac91bb0 mem-ruby: Add categorization of bypassed atomics in TCC (#899) Matt Sinclair 2024-02-28 14:26:09 -06:00
  • 523d4ae4ec Prepare dataframe format for Latex plots Derek Christ 2024-02-28 16:26:37 +01:00
  • 8a28ca8ffb mem-ruby: Add missing transition for SLC writes to VIPER TCC (#894) Matt Sinclair 2024-02-28 00:13:07 -06:00
  • de615836f0 mem-ruby: Add categorization of bypassed atomics in TCC Daniel Kouchekinia 2024-02-27 22:55:13 -06:00
  • 0fd73f4e05 Merge branch 'develop' into missing-tcc-transition Daniel Kouchekinia 2024-02-27 16:46:30 -06:00
  • 9ff0e4ad51 First plotting scripts Derek Christ 2024-02-27 22:17:22 +01:00
  • 4e12f2486b util: update list_changes.py to support multiple Change-Ids (#861) Richard Cooper 2024-02-27 19:10:31 +00:00
  • e5eea7efcc mem: QoS q_policy assertions fix (#889) Giacomo Travaglini 2024-02-27 13:32:19 +00:00
  • e78a6b71fe Merge branch 'develop' into qos-qpolicy-assertions-fix Hristo Belchev 2024-02-27 09:38:34 +00:00
  • 920497c19f tests: Add compiler test for gcc 13 (#858) Harshil Patel 2024-02-26 15:03:14 -08:00
  • 2ca7f48828 arch-vega: Accumulation offset for existing MFMA insts Matthew Poremba 2024-02-26 13:18:43 -06:00
  • 6374697a20 mem-ruby: Add missing transition for SLC writes to VIPER TCC Daniel Kouchekinia 2024-02-08 21:13:19 -06:00
  • e0e65221b4 arch-vega: Use accum offset for v_accvgpr_read/write Matthew Poremba 2024-02-26 12:48:48 -06:00
  • 8722aef2e2 gpu-compute: Store accum_offset from code object in WF Matthew Poremba 2024-02-20 13:34:51 -06:00
  • 1990186170 configs: Ensure m5ops base doesn't overlap physical mem in KVM (#875) Nicholas Mosier 2024-02-26 10:33:48 -08:00
  • bcf455755e arch-riscv,dev: Update the PLIC implementation (#886) Yu-Cheng Chang 2024-02-27 02:32:53 +08:00
  • 521a7c1de0 tests: Exit riscv_asmtest script with simulator status code (#891) Yu-Cheng Chang 2024-02-27 02:31:18 +08:00