arch-vega: Implement flat_load_sbyte instruction (#953)
Change-Id: I642a71c504e2d3afecd5d2dfd9db016945aed21b
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@@ -110,17 +110,43 @@ namespace VegaISA
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void
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Inst_FLAT__FLAT_LOAD_SBYTE::execute(GPUDynInstPtr gpuDynInst)
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{
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panicUnimplemented();
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Wavefront *wf = gpuDynInst->wavefront();
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if (gpuDynInst->exec_mask.none()) {
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wf->decVMemInstsIssued();
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if (isFlat()) {
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wf->decLGKMInstsIssued();
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}
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return;
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}
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gpuDynInst->execUnitId = wf->execUnitId;
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gpuDynInst->latency.init(gpuDynInst->computeUnit());
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gpuDynInst->latency.set(gpuDynInst->computeUnit()->clockPeriod());
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calcAddr(gpuDynInst, extData.ADDR, extData.SADDR, instData.OFFSET);
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issueRequestHelper(gpuDynInst);
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} // execute
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void
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Inst_FLAT__FLAT_LOAD_SBYTE::initiateAcc(GPUDynInstPtr gpuDynInst)
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{
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initMemRead<VecElemI8>(gpuDynInst);
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} // initiateAcc
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void
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Inst_FLAT__FLAT_LOAD_SBYTE::completeAcc(GPUDynInstPtr gpuDynInst)
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{
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VecOperandU32 vdst(gpuDynInst, extData.VDST);
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for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
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if (gpuDynInst->exec_mask[lane]) {
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vdst[lane] = (VecElemI32)((reinterpret_cast<VecElemI8*>(
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gpuDynInst->d_data))[lane]);
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}
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}
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vdst.write();
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} // execute
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// --- Inst_FLAT__FLAT_LOAD_USHORT class methods ---
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