arch-vega: Implement flat_load_sbyte instruction (#953)

Change-Id: I642a71c504e2d3afecd5d2dfd9db016945aed21b
This commit is contained in:
Michael Boyer
2024-03-21 21:11:10 -07:00
committed by GitHub
parent 76965c6431
commit 803dbbfdac

View File

@@ -110,17 +110,43 @@ namespace VegaISA
void
Inst_FLAT__FLAT_LOAD_SBYTE::execute(GPUDynInstPtr gpuDynInst)
{
panicUnimplemented();
Wavefront *wf = gpuDynInst->wavefront();
if (gpuDynInst->exec_mask.none()) {
wf->decVMemInstsIssued();
if (isFlat()) {
wf->decLGKMInstsIssued();
}
return;
}
gpuDynInst->execUnitId = wf->execUnitId;
gpuDynInst->latency.init(gpuDynInst->computeUnit());
gpuDynInst->latency.set(gpuDynInst->computeUnit()->clockPeriod());
calcAddr(gpuDynInst, extData.ADDR, extData.SADDR, instData.OFFSET);
issueRequestHelper(gpuDynInst);
} // execute
void
Inst_FLAT__FLAT_LOAD_SBYTE::initiateAcc(GPUDynInstPtr gpuDynInst)
{
initMemRead<VecElemI8>(gpuDynInst);
} // initiateAcc
void
Inst_FLAT__FLAT_LOAD_SBYTE::completeAcc(GPUDynInstPtr gpuDynInst)
{
VecOperandU32 vdst(gpuDynInst, extData.VDST);
for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
if (gpuDynInst->exec_mask[lane]) {
vdst[lane] = (VecElemI32)((reinterpret_cast<VecElemI8*>(
gpuDynInst->d_data))[lane]);
}
}
vdst.write();
} // execute
// --- Inst_FLAT__FLAT_LOAD_USHORT class methods ---