Commit Graph

552 Commits

Author SHA1 Message Date
Giacomo Travaglini
adaab745a3 arch-arm, dev-arm: Move inSecureState helper to ISA class
The helper function should be really part of the Arm ISA class

Change-Id: Ida0393a12426c8973a9b8171ec2922c2dcec9f5a
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/53268
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-12-07 18:58:49 +00:00
Gabe Black
2805f3dee1 misc: Stop including arch/pcstate.hh.
Change-Id: Ic9ea62ae9c59fd838175fd6af4c075101d46a0b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52067
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-11-30 23:30:06 +00:00
Gabe Black
636783856f dev-arm: Ensure all fields of GicV2 are initialized.
The constructor tried to initialize all values, but in particular missed
intGroup, and may have missed other values as well.

Change-Id: Ibcd610e40259e46e3cde9b76c7f9ddc816832dfd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52406
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-11-09 21:40:58 +00:00
Gabe Black
ba5f68db3d misc: Use python 3's argumentless super().
When calling a method in a superclass, you can/should use the super()
method to get a reference to that class. The python 2 version of that
method takes two parameters, the current class name, and the "self"
instance. The python 3 version takes no arguments. This is better for a
at least three reasons.

First, this version is less verbose because you don't have to specify
any arguments.

Second, you don't have to remember which argument goes where (I always
have to look it up), and you can't accidentally use the wrong class
name, or forget to update it if you copy code from a different class.

Third, this version will work correctly if you use a class decorator.
I don't know exactly how the mechanics of this work, but it is referred
to in a comment on this stackoverflow question:

https://stackoverflow.com/questions/681953/how-to-decorate-a-class

Change-Id: I427737c8f767e80da86cd245642e3b057121bc3b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52224
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-11-09 13:04:44 +00:00
Gabe Black
314dae4b86 dev-arm: Set cntkctl and cnthctl in the CoreTimers constructor.
The cntkctl and cnthctl registers were not initialized by the CoreTimers
constructor which upset valgrind when they were later used by
handleStream.

Change-Id: Iaedbb2d957aeb428fd563be2e24ccb8d2cf57f26
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/52403
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-11-06 08:39:46 +00:00
Gabe Black
6107dd11c6 misc: Remove include of arch/page_size.hh, and fix up includes.
Remove the only remaining use of arch/page_size.hh, and fix up a couple
files which were using one of the constants defined in a specific arch
version of it without including the file they needed directly.

Change-Id: I6da5638ca10c788bd42197f4f5180e6b66f7b87f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50765
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-10-22 21:43:02 +00:00
Giacomo Travaglini
847f642f0e arch-arm: Add TxSZ to PageTableOps::index
This patch is adding the input address (IA) size (TSZ) to the
index method, as it is limiting the number of bits used to
determine the descriptor index from the input address

Change-Id: Ibc8f9ce94ea0ce06093bd90546ca1a906518b700
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51807
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-10-21 08:06:44 +00:00
Giacomo Travaglini
1b6c050ebf arch-arm, dev-arm: Use PageTableOps in Arm TableWalker
As the VMSA is shared between the CPU MMU and the SMMU, we move the
PageTableOps data structures to the arch/arm/pagetable.hh/cc sources.

Both MMUs will make use of them

Change-Id: I3a1113f6ef56f8d879aff2df50a01037baca82ff
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51672
Tested-by: kokoro <noreply+kokoro@google.com>
2021-10-21 08:06:44 +00:00
Gabe Black
73025695c7 scons: Use tags to gate ISA files and not env['TARGET_ISA'].
Change-Id: Ib81a4c570fbb050fa7d82919edacfed004c6800e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50336
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2021-10-19 20:41:03 +00:00
Quentin Forcioli
9854685277 dev-arm: Added trusted DRAM to vexpress Realview
Added the 32MB of trusted DRAM to the VExpress_GEM5_Base Realview.
This trusted DRAM is however not protected against unsecure access.

This commit is part of series of commit to enable booting OPTEE on gem5.

Change-Id: Icbbaec8488dd72e1cbe70015a7f7904de35b38bf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49989
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-10-12 09:29:50 +00:00
Giacomo Travaglini
152760ee51 arch-arm: Define an ArmRelease class to handle ISA extensions
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I3240853bd2123a6f24b2bb64c90ad457696f0d93
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/51010
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-29 22:16:03 +00:00
Giacomo Travaglini
377155c10b arch-arm: Syncronize GIC CPU interface when changing EL
From the GIC architecture specification (ihi0069) [1]

"The assertion and de-assertion of IRQs and FIQs are affected by the
current Exception level and Security state of the PE. As part of the
Context Synchronization that occurs as the result of taking or returning
from an exception, the CPU interface ensures that IRQ and FIQ are both
appropriately asserted or deasserted for the Exception level and
Security state that the PE is entering."

Kudos to Quentin Forcioli for finding the bug

[1]: https://developer.arm.com/documentation/ihi0069/latest

Change-Id: I10444a3aad5c06aabc13e1cbd70a32192531a31d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50508
Reviewed-by: Quentin Forcioli <quentin.forcioli@telecom-paris.fr>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 09:03:19 +00:00
Gabe Black
00876fff20 misc: Replace the GEM5_VAR_USED macro with [[maybe_unused]].
The [[maybe_unused]] attribute is now standard, so we can use that
directly without hiding it behind a macro.

Change-Id: If24ffd7e50bdb503cb3e6ea61f226ea794e84b8f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48511
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-29 10:17:51 +00:00
Gabe Black
cb266a099f misc: Replace GEM5_FALLTHROUGH with [[fallthrough]].
Now that the [[fallthrough]] attribute is standard (as of c++-17), we
can use it directly instead of hiding it behind a macro.

Change-Id: I4d11e35b619532b1a3fd8d042265e18c80d86f9b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/48505
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-24 21:57:04 +00:00
Gabe Black
d58b4f004e misc: Remove typedef (struct|enum) Foo in cpp files.
In C, to refer to a type without a struct or enum tag on the type, you
need to typedef it like this:

typedef struct
{
} Foo;

Foo foo;

In C++, this is unnecessary:

struct Foo
{
};

Foo foo;

Remove all of the first form in C++ files and replace them with the
second form.

Change-Id: I37cc0d63b2777466dc6cc51eb5a3201de2e2cf43
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46199
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-07 08:35:12 +00:00
Daniel R. Carvalho
4b2118ed4b misc: Remove sim/cur_tick dependency from sim/core.hh
Remove this unnecessary dependency. Fixed all incorrect
includes of sim/core.hh.

Change-Id: I3ae282dbaeb45fbf4630237a3ab9b1a593ffbe0c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43592
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-06 09:59:11 +00:00
Daniel R. Carvalho
974a47dfb9 misc: Adopt the gem5 namespace
Apply the gem5 namespace to the codebase.

Some anonymous namespaces could theoretically be removed,
but since this change's main goal was to keep conflicts
at a minimum, it was decided not to modify much the
general shape of the files.

A few missing comments of the form "// namespace X" that
occurred before the newly added "} // namespace gem5"
have been added for consistency.

std out should not be included in the gem5 namespace, so
they weren't.

ProtoMessage has not been included in the gem5 namespace,
since I'm not familiar with how proto works.

Regarding the SystemC files, although they belong to gem5,
they actually perform integration between gem5 and SystemC;
therefore, it deserved its own separate namespace.

Files that are automatically generated have been included
in the gem5 namespace.

The .isa files currently are limited to a single namespace.
This limitation should be later removed to make it easier
to accomodate a better API.

Regarding the files in util, gem5:: was prepended where
suitable. Notice that this patch was tested as much as
possible given that most of these were already not
previously compiling.

Change-Id: Ia53d404ec79c46edaa98f654e23bc3b0e179fe2d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46323
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-07-01 19:08:24 +00:00
Daniel R. Carvalho
223b0b388e mem: Conclude deprecation of MemObject
This has been marked as deprecated a few versions ago,
so it is safe to conclude its deprecation process.

Change-Id: I20d37700c97264080a7b19cf0cf9ccf8a5b65c32
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/47299
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-28 20:25:07 +00:00
Yu-hsin Wang
3aa64284b1 dev-arm: add ArmSigInterruptPin
ArmSigInterruptPin helps connecting ArmInterruptPin with general
interrupt pin.

Change-Id: I4235fa0714054079a111163caca8dd3985999095
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45266
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-06-02 00:19:51 +00:00
Daniel R. Carvalho
98ac080ec4 base-stats,misc: Rename Stats namespace as statistics
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Stats became ::statistics.

"statistics" was chosen over "stats" to avoid generating
conflicts with the already existing variables (there are
way too many "stats" in the codebase), which would make
this patch even more disturbing for the users.

Change-Id: If877b12d7dac356f86e3b3d941bf7558a4fd8719
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45421
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
a658ea043f base,dev,mem-ruby: Rename m5 namespace as gem5
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::m5 became ::gem5.

Change-Id: I250b4354113fcd6005dc4144ae378552cb8f6717
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45437
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
4dd099ba3d misc: Rename Enums namespace as enums
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Enums became ::enums.

Change-Id: I39b5fb48817ad16abbac92f6254284b37fc90c40
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45420
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
e291376f07 cpu,mem: Rename ContextSwitchTaskId namespace
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ContextSwitchTaskId becomes ::context_switch_task_id.

Change-Id: If3884a5da7afe6144954d556b3b54f659bb7afb5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45411
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
71460cb13e sim,misc: Rename Int namespace as as_int
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

sim_clock::Int became sim_clock::as_int.

"as_int" was chosen because "int" is a reserved
keyword, and this namespace acts as a selector of
how to read the internal variables.

Another possibility to resolve this would be to
remove the namespaces "Float" and "Int" and use
unions instead.

Change-Id: I65f47608d2212424bed1731c7f53d242d5a7d89a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45436
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
c487767cff sim,misc: Rename Float namespace as as_float
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

sim_clock::Float became sim_clock::as_float.

"as_float" was chosen because "float" is a reserved
keywords, and this namespace acts as a selector of
how to read the internal variables. Another
possibility to resolve this would be to remove the
namespaces "Float" and "Int" and use unions instead.

Change-Id: I7b3d9c6e9ab547493d5596c7eda080a25509a730
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45435
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
0967a43c10 misc: Rename SimClock namespace as sim_clock
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::SimClock became ::sim_clock.

Change-Id: I25b8cfc93f283081bc2add9fdef6fec7d7ff3846
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45402
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
3016478068 base-stats: Rename Units namespace as units
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

Stats::Units became Stats::units.

Change-Id: I9ce855b291db122d952098a090a2984b42152850
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45415
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
fd660886c7 dev: Put PS2 classes in the ps2 namespace
These classes belong in the ps2 namespace. Use this
opportunity to rename PS2Device as ps2::Device, and
PS2TouchKit as ps2::TouchKit.

Unfortunately, since the ps2::Mouse and ps2::Keyboard
namespaces are being deprecated, these names cannot be
used as of now to rename PS2Mouse and PS2Keyboard.

Change-Id: I9a57b87053a6a0acb380a919e09ab427fdb8eca4
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45395
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-25 09:22:17 +00:00
Daniel R. Carvalho
78915f1895 dev-arm: Rename SCMI namespace as scmi
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::SCMI became ::scmi.

Change-Id: I68f729124079ecce02120577d2b89b25f10bde4a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45392
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-21 10:05:09 +00:00
Daniel R. Carvalho
fef8e578bf dev: Rename ps2 variables as ps2Device
Pave the way for a ps2 namespace.

Change-Id: I61fa33c57aee3e7c6df02a364420e4f83901f60b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45389
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-21 10:05:09 +00:00
Gabe Black
4abe9ac08b misc: Switch away from the deprecated UNIT_* macros.
Expand the macros in place.

Change-Id: I5dba512b99a1204c23a995e112248b86523b77c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45560
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-19 21:42:34 +00:00
Daniel R. Carvalho
9b675ebea8 misc: Add missing compiler.hh include
Add some missing base/compiler.hh includes.

Found by manually checking the files in:
  grep -r --include \*.hh -L \
    '#include "base/compiler.hh"' \
    $(grep -r -l "GEM5_" src/)

And occasionally checking some .cc files through
a similar methodology.

Change-Id: I6b6e27189c627bb76ace73c338486743d469be46
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45459
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-14 10:02:14 +00:00
Gabe Black
02ae343c66 misc: Replace M5_CLASS_VAR_USED with GEM5_CLASS_VAR_USED.
Change-Id: Ibd2230d684f41201b07fa9083881145e36176a68
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45241
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
c480558532 misc: Replace M5_UNREACHABLE with GEM5_UNREACHABLE.
Change-Id: Id4cbdb8ae58c1077411e01579ac3a2d72b3b7465
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45238
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Gabe Black
11fe13c311 misc: Replace M5_FALLTHROUGH with GEM5_FALLTHROUGH.
Change-Id: I058f311b6d9c284f745bcc915db72236d05db21b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45233
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-11 20:16:31 +00:00
Gabe Black
fb3befcc6d misc: Replace M5_VAR_USED with GEM5_VAR_USED.
Change-Id: I64a874ccd1a9ac0541dfa01971d7d620a98c9d32
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45231
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
2021-05-11 20:16:31 +00:00
Giacomo Travaglini
c2b91143b4 dev-arm: Turn flash1 into a CFI Flash Memory
Change-Id: I21bdc165fba88d6366ea500a8a662fe0dcc02dab
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41496
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-04-16 09:52:55 +00:00
Giacomo Travaglini
b3af12ccd5 dev-arm: Align gem5 to FVP Base PCI
The VExpress_GEM5_Foundation platform was reserving
a region of the memory map (@ 0x4 0000 0000) for PCI.

The Armv8-A FVP Foundation platform is not PCI capable at
the moment, so any PCI logic is really gem5 specific.
With this patch we are aligning gem5 to the FVP Base Platform,
which supports PCI and it is reserving 256GiB of memory
starting at 0x40 0000 0000 (256GiB).

Fast Models - Reference Manual - Version 11.8

At the moment we are still supporting a single DRAM range,
starting at 2GiB. So DRAM could overlap with the PCI memory
region though it is unlikely to happen in near future as
it would require a DRAM size > 254 GiB.

JIRA: https://gem5.atlassian.net/browse/GEM5-898

Change-Id: I506fd6696cdddc39d057602581cb16b30db3f7c7
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44165
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2021-04-07 09:09:49 +00:00
Daniel R. Carvalho
5c8983fc18 misc: Fix remaining opening braces
These were not caught by the previous patches because
the grep used ignored:
- anonymous structures
  (e.g., "struct {")
- opening braces without leading spaces
  (e.g., "struct Name{"),
- weird chars in auto-generation files
  (e.g., "struct $name {").
- extra characters after the opening brace.
  (e.g., "struct Name { // Comment")
- typedefs (note that this is not caught by the verifier)
  (e.g., "typedef struct Name {")

Most of this has been fixed be grepping structures
with the following regex:
  grep -nrE --exclude-dir=systemc \
    "^ *(typedef)* *(struct|class|enum|union) [^{]*{$" src/

The following makes sure that "struct{" is captured:
  grep -nrE --exclude-dir=systemc \
    "^ *(struct|class|enum|union){" src/

To find cases that contain a comment after the
opening brace:
  grep -nrE --exclude-dir=systemc \
    "^ *(struct|class|enum|union)[^{]*{\s*//" src/

Change-Id: I9f822bed628d13b1a09ccd6059373aff63a8d7bd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43505
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-04-07 01:29:31 +00:00
Gabe Black
26c62ae563 dev: Remove cruft from the Platform devices.
These bits of cruft are unnecessary includes, unnecessary declarations
of classes which aren't used, and methods which aren't used, and are
also frequently not implemented.

Change-Id: I3df6d60983354bb545bc11880fb6e16fe74adb1d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43665
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-29 21:10:30 +00:00
Gabe Black
5f95d7a89a dev,cpu,configs: Get rid of the IntrControl device.
This vestigial device provides a thin layer of indirection between
devices and the CPUs in a system. It's basically a collection of helper
functions, but since it's a SimObject it needs to be instantiated in
python and added to configurations.

Change-Id: I029d2314ae0bb890678e1e68dafcdab4bfe49beb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43347
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-29 20:54:16 +00:00
Daniel R. Carvalho
7f1de4e686 misc: Fix coding style for enum's opening braces
The systemc dir was not included in this fix.

First it was identified that there were only occurrences
at 0, 1, and 2 levels of indentation (and 2 of 2 spaces,
1 of 3 spaces and 2 of 12 spaces), using:

    grep -nrE --exclude-dir=systemc \
        "^ *enum [A-Za-z].* {$" src/

Then the following commands were run to replace:

    <indent level>enum X ... {

by:

    <indent level>enum X ...
    <indent level>{

Level 0:
    grep -nrl --exclude-dir=systemc \
        "^enum [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^enum ([A-Za-z].*) \{$/enum \1\n\{/g'

Level 1:
    grep -nrl --exclude-dir=systemc \
        "^    enum [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^    enum ([A-Za-z].*) \{$/    enum \1\n    \{/g'

and so on.

Change-Id: Ib186cf379049098ceaec20dfe4d1edcedd5f940d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43326
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-23 16:26:04 +00:00
Bobby R. Bruce
af81ec9041 Merge "misc: Merge branch 'release-staging-v21-0' into develop" into develop 2021-03-19 21:13:58 +00:00
Daniel R. Carvalho
2922f763e1 misc: Fix coding style for struct's opening braces
The systemc dir was not included in this fix.

First it was identified that there were only occurrences
at 0, 1, 2 and 3 levels of indentation (and a single
occurrence of 2 and 3 spaces), using:

    grep -nrE --exclude-dir=systemc \
        "^ *struct [A-Za-z].* {$" src/

Then the following commands were run to replace:

<indent level>struct X ... {

by:

<indent level>struct X ...
<indent level>{

Level 0:
    grep -nrl --exclude-dir=systemc
        "^struct [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^struct ([A-Za-z].*) \{$/struct \1\n\{/g'

Level 1:
    grep -nrl --exclude-dir=systemc \
        "^    struct [A-Za-z].* {$" src/ | \
        xargs sed -Ei \
        's/^    struct ([A-Za-z].*) \{$/    struct \1\n    \{/g'

and so on.

Change-Id: I362ef58c86912dabdd272c7debb8d25d587cd455
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/39017
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-19 20:57:24 +00:00
Bobby R. Bruce
68064d8043 misc: Merge branch 'release-staging-v21-0' into develop
Change-Id: I0ad043ded56fb848e045057a1e7a56ea39797906
2021-03-18 11:13:14 -07:00
Giacomo Travaglini
9ffcf15471 dev-arm: Remove unused SMMUv3 WalkCache variables
Those were grouped within the stats data structures but were
not actually stats

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I01bbbada423825ded04a033c0709108e2980ec70
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42985
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-16 10:25:57 +00:00
Giacomo Travaglini
d8b172917a dev-arm: Fix WalkCache stats
The WalkCache stats are wrongly using the legacy framework.
With this patch we are registering those to the hierarchical structure.

As we need to pass the Stats::Group parent at construction time,
we are replacing 2d arrays with Vector2d for count stats and using a flat
vector of pointers for the Formula stats

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I8992bc262a376e4e81a4d608c11dff6902e0a01d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42984
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-16 10:25:57 +00:00
Giacomo Travaglini
1806525833 dev-arm: Fix SMMUv3BaseCache Stats
After [1] the SMMUv3BaseCache stats are undistinguible within each
other.

With this patch we are adding a string to their constructor so
that we can distinguish between an IPA, Config etc cache stat

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/36415

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Iaa84ed948cf2a4c36ea4fcda589676b9bbeed6fd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42983
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-16 10:25:57 +00:00
Gabe Black
e837fdc65c base,misc: Collapse and eliminate the ULL and LL macros.
These just move the ULL or LL suffix to the value in question, and cast
to a uint64_t or an int64_t. We should be able to drop the cast
entirely, and turn the macro into a suffix for the literals in question.

Change-Id: Ia3db35d56137b57def6cf8e27e8457357eb83f62
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42505
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-11 04:14:17 +00:00
Gabe Black
4dcfa34c18 arch-arm,base,dev: Eliminate the power() function from intmath.hh.
This function causes problems with gcc 5 which incorrectly complains
about the call to warn_if inside a constexpr function. That should only
be an error if a call to a non-constexpr is unavoidable, and even then
the compiler isn't required to emit a diagnostic.

Rather than drop the warning, or add ifdefs to deal with these defective
versions of gcc, this change eliminates the power() function entirely.
Most inputs to this function would overflow anyway, which is reportedly
why no integer version of an exponentiation function is defined in the
standard library, and all uses of this function can easily and more
efficiently be replaced by simple left and right shifts.

Finally, by eliminating the power() function, we also remove the
dependence on base/logging.hh.

Change-Id: I4d014163883d12db46da4ee752696c8225534ee8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42504
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-03-09 09:09:45 +00:00