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dev-arm: Fix SMMUv3BaseCache Stats

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After [1] the SMMUv3BaseCache stats are undistinguible within each
other.

With this patch we are adding a string to their constructor so
that we can distinguish between an IPA, Config etc cache stat

[1]: https://gem5-review.googlesource.com/c/public/gem5/+/36415

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Iaa84ed948cf2a4c36ea4fcda589676b9bbeed6fd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42983
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Giacomo Travaglini
2021-03-14 16:12:05 +00:00
parent fb1e29a17b
commit 1806525833
3 changed files with 22 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
src/dev/arm/smmu_v3_caches.cc
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, 2018-2019 ARM Limited
* Copyright (c) 2014, 2018-2019, 2021 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -59,12 +59,12 @@
*/
SMMUv3BaseCache::SMMUv3BaseCache(const std::string &policy_name, uint32_t seed,
Stats::Group *parent) :
replacementPolicy(decodePolicyName(policy_name)),
Stats::Group *parent, const std::string &name)
: replacementPolicy(decodePolicyName(policy_name)),
nextToReplace(0),
random(seed),
useStamp(0),
baseCacheStats(parent)
baseCacheStats(parent, name)
{}
int
@@ -82,8 +82,9 @@ SMMUv3BaseCache::decodePolicyName(const std::string &policy_name)
}
SMMUv3BaseCache::
SMMUv3BaseCacheStats::SMMUv3BaseCacheStats(Stats::Group *parent)
: Stats::Group(parent),
SMMUv3BaseCacheStats::SMMUv3BaseCacheStats(
Stats::Group *parent, const std::string &name)
: Stats::Group(parent, name.c_str()),
ADD_STAT(averageLookups,
UNIT_RATE(Stats::Units::Count, Stats::Units::Second),
"Average number lookups per second"),
@@ -144,9 +145,10 @@ SMMUv3BaseCacheStats::SMMUv3BaseCacheStats(Stats::Group *parent)
*/
SMMUTLB::SMMUTLB(unsigned numEntries, unsigned _associativity,
const std::string &policy, Stats::Group *parent)
const std::string &policy, Stats::Group *parent,
const std::string &name)
:
SMMUv3BaseCache(policy, SMMUTLB_SEED, parent),
SMMUv3BaseCache(policy, SMMUTLB_SEED, parent, name),
associativity(_associativity)
{
if (associativity == 0)
@@ -426,7 +428,7 @@ SMMUTLB::pickEntryIdxToReplace(const Set &set, AllocPolicy alloc)
ARMArchTLB::ARMArchTLB(unsigned numEntries, unsigned _associativity,
const std::string &policy, Stats::Group *parent)
:
SMMUv3BaseCache(policy, ARMARCHTLB_SEED, parent),
SMMUv3BaseCache(policy, ARMARCHTLB_SEED, parent, "tlb"),
associativity(_associativity)
{
if (associativity == 0)
@@ -625,7 +627,7 @@ ARMArchTLB::pickEntryIdxToReplace(const Set &set)
IPACache::IPACache(unsigned numEntries, unsigned _associativity,
const std::string &policy, Stats::Group *parent)
:
SMMUv3BaseCache(policy, IPACACHE_SEED, parent),
SMMUv3BaseCache(policy, IPACACHE_SEED, parent, "ipa"),
associativity(_associativity)
{
if (associativity == 0)
@@ -805,7 +807,7 @@ IPACache::pickEntryIdxToReplace(const Set &set)
ConfigCache::ConfigCache(unsigned numEntries, unsigned _associativity,
const std::string &policy, Stats::Group *parent)
:
SMMUv3BaseCache(policy, CONFIGCACHE_SEED, parent),
SMMUv3BaseCache(policy, CONFIGCACHE_SEED, parent, "cfg"),
associativity(_associativity)
{
if (associativity == 0)
@@ -969,7 +971,7 @@ ConfigCache::pickEntryIdxToReplace(const Set &set)
WalkCache::WalkCache(const std::array<unsigned, 2*WALK_CACHE_LEVELS> &_sizes,
unsigned _associativity, const std::string &policy,
Stats::Group *parent) :
SMMUv3BaseCache(policy, WALKCACHE_SEED, parent),
SMMUv3BaseCache(policy, WALKCACHE_SEED, parent, "walk"),
walkCacheStats(&(SMMUv3BaseCache::baseCacheStats)),
associativity(_associativity),
sizes()
@@ -1226,7 +1228,7 @@ WalkCache::pickEntryIdxToReplace(const Set &set,
WalkCache::
WalkCacheStats::WalkCacheStats(Stats::Group *parent)
: Stats::Group(parent, "WalkCache")
: Stats::Group(parent)
{
using namespace Stats;

9
src/dev/arm/smmu_v3_caches.hh
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014, 2018-2019 ARM Limited
* Copyright (c) 2014, 2018-2019, 2021 Arm Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -67,7 +67,7 @@ class SMMUv3BaseCache
struct SMMUv3BaseCacheStats : public Stats::Group
{
SMMUv3BaseCacheStats(Stats::Group *parent);
SMMUv3BaseCacheStats(Stats::Group *parent, const std::string &name);
Stats::Formula averageLookups;
Stats::Scalar totalLookups;
@@ -87,7 +87,7 @@ class SMMUv3BaseCache
public:
SMMUv3BaseCache(const std::string &policy_name, uint32_t seed,
Stats::Group *parent);
Stats::Group *parent, const std::string &name);
virtual ~SMMUv3BaseCache() {}
};
@@ -122,7 +122,8 @@ class SMMUTLB : public SMMUv3BaseCache
};
SMMUTLB(unsigned numEntries, unsigned _associativity,
const std::string &policy, Stats::Group *parent);
const std::string &policy, Stats::Group *parent,
const std::string &name);
SMMUTLB(const SMMUTLB& tlb) = delete;
virtual ~SMMUTLB() {}

4
src/dev/arm/smmu_v3_deviceifc.cc
View File

@@ -49,11 +49,11 @@ SMMUv3DeviceInterface::SMMUv3DeviceInterface(
microTLB(new SMMUTLB(p.utlb_entries,
p.utlb_assoc,
p.utlb_policy,
this)),
this, "utlb")),
mainTLB(new SMMUTLB(p.tlb_entries,
p.tlb_assoc,
p.tlb_policy,
this)),
this, "maintlb")),
microTLBEnable(p.utlb_enable),
mainTLBEnable(p.tlb_enable),
devicePortSem(1),