Commit Graph

4663 Commits

Author SHA1 Message Date
Daniel R. Carvalho
9f55bb8478 base: Rename Loader namespace as loader
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Loader became ::loader.

Change-Id: Ifddf11ab4d5d7358032fbc523bc923c0a9feedbd
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45424
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
4dd099ba3d misc: Rename Enums namespace as enums
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Enums became ::enums.

Change-Id: I39b5fb48817ad16abbac92f6254284b37fc90c40
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45420
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
90aab2f926 sim: Rename ProbePoints namespace as probing
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ProbePoints became ::probing.

"probing" was chosen over "probe_points" because the
namespace contains more than solely probe points; it
contains all classes related to the act of probing.

Change-Id: I44567974a521707593739a2bd5933391803e5b51
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45412
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Daniel R. Carvalho
e291376f07 cpu,mem: Rename ContextSwitchTaskId namespace
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::ContextSwitchTaskId becomes ::context_switch_task_id.

Change-Id: If3884a5da7afe6144954d556b3b54f659bb7afb5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45411
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-29 11:13:49 +00:00
Gabe Black
fc3e7214de cpu,fastmodel: Get rid of the unused ThreadContext::getPhysProxy.
Change-Id: I31abd77235310c8577c4281bbefaea57a25feb73
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45905
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-29 05:34:46 +00:00
Gabe Black
edc17fe9ec x86: Avoid including arch/x86/registers.hh.
Don't include arch/x86/registers.hh when other, local headers have the
actual information we need.

Change-Id: I9a7407475b04231ac84d9c5bb299915eadec3589
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40337
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 23:41:03 +00:00
Gabe Black
a91af24e60 misc: Clean up ISA switching header includes.
Remove includes that aren't needed, including ones for
config/the_isa.hh.

Also stop using switching includes when the ISA is known.

Change-Id: I2af6c88dcaf511b086ec808b0ba3196179982af2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40336
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 23:41:03 +00:00
Gabe Black
8ab9e72804 arch,base,cpu: Split arch/pcstate.hh out of arch/types.hh.
The only thing brought in by arch/types.hh is TheISA::PCState. Instead
of having the other types around where they could be used accidentally,
and to make it more obvious what's being exported, this change splits
PCState out into a new switching header called arch/pcstate.hh. The
original arch/types.hh is no longer a switching header, and includes
pcstate.hh.

Change-Id: I8dfd298349e4565f316f7b9a028703289ada6010
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40177
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 23:41:03 +00:00
Gabe Black
1cf41d4c54 arch-riscv: Split up read/write and read only CSR instructions.
If RS1 is X0 or if using an immediate and the value encoded in the RS1
field which is used as the immediate is zero, then the CSR is not
actually written. It doesn't matter whether the register value would
change or not.

Also, if an instruction wants to write to the CSR, the manual does not
say anything about whether or not the register value changes. If a
register is read only, attempting to write it with *any* value should be
illegal.

Change-Id: Ic876eff0fc0c7e25a40ba9213e3c3e49bfa7a33e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45522
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 23:25:13 +00:00
Gabe Black
d9bda9c2be cpu,fastmodel: Get rid of unused (read|set)FuncExeInst.
These zombie methods were plumbed around and looked like they might do
something, but nothing actually uses them.

Change-Id: I1e85669202e2ecb10370e6c6eb8364eb47085cf3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45919
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
2021-05-28 18:51:55 +00:00
Gabe Black
d583a9a227 arch: Template the generic PC types on the instruction width.
These had been templated on a type, and then the width of that type was
considered the amount the PC should advance when executing straight line
code. That type was MachInst, which was loosely the size of an
instruction, but was practically whatever sized data type was fed into
the decoder at a time.

Instead of tying this to a type, this change moves it over to be a
simple number. This avoids a level of indirection, and also further
decouples the type the decoder might use as input from the instruction
size.

Change-Id: I797876a33d27e759c7a6e23a658179201fabfa47
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40176
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-28 18:51:04 +00:00
Gabe Black
e555fedf96 arch: Eliminate the now unused remote_gdb.hh switching header.
Change-Id: Ideb04254a65670350d319c2273539d8bc9e48d70
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44620
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 07:56:19 +00:00
Gabe Black
9f547559d8 arch,base,sim: Move GDB stub creation into the arch Workloads.
These classes know what flavor of GDB stub they want, so there's no need
for TheISA:: to multiplex.

Change-Id: Ia428fe391719a3320d865421fc59352a17875bcf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44619
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 07:56:19 +00:00
Gabe Black
b6d4e871ef arch,base,sim: Construct the GDB stub with no threads.
By moving the installation of even the first ThreadContext out of the
constructor, it's possible to construct the stub separately. We can then
move the code that creates the stub out of the base class and into
architecture specific sub-classes.

Change-Id: I0dfd53a3135ebc98ec49acf81d83e58830bc365c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44618
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-28 07:56:19 +00:00
Gabe Black
51ddd16172 arch-x86: If possible, use the workload to pick GDB arch.
When using remote GDB to debug an x86 simulated system within gem5, the
stub within gem5 needs to decide what arch the GDB instance expects.
That determines what format the blob of data with register values should
be.

Previously, gem5 would make that decision based on the current mode of
the target thread context. If the target was currently executing in 64
bit mode, that would imply that GDB was expecting 64 bit registers. If
not, then it was probably trying to debug a 32 bit program and would
expect 32 bit registers.

That works in many circumstances, but won't work if, for instance, a CPU
has not yet been initialized and is not running in its final, typical
mode, or if it's dipped into another mode to, for instance, run a user
mode program which is 32 bit under a 64 bit kernel.

This change modifies the GDB stub to first try to use the workload
object to determine what arch the GDB instance is most likely to assume.
This is a reasonably accurate representation for the arch GDB expects,
even though there isn't a direct, enforced link. It would be best if GDB
could just tell us what it expected, but I wasn't able to find any way
to get it to do that.

In most (all?) cases where someone would be using GDB to debug the guest
there will be a workload, and that workload will have a well defined
architecture. Since that isn't technically required though, this change
will still fall back to the old detection mechanism if it can't tell
from the workload, or if there is no workload in the first place.

Later revisions of the GDB interface may tie the remote GDB stub to the
workload object itself, in which case it *will* be possible to assume
that a workload object exists, and the workload object will be able to
explicitly select what GDB stub to use based on what it's running. In
the mean time, this seems like a fairly robust approximation of that.

Change-Id: I5059d48c28380e2fee5629d832acf95063a1a27a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44614
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 07:56:19 +00:00
Gabe Black
6ceaf92084 arch-riscv: Decode more of the CSR instructions at decode time.
Figure out more about what the CSR instructions are supposed to do at
decode/instruction construction time, instead of at run time. An
instruction will usually be constructed many fewer times than it will be
executed, so we can perform the work once and then use it many times.

Change-Id: I9941bb2555e67a6c738aa3dfdca1b4857427b71c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45521
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 07:48:44 +00:00
Gabe Black
7186fc4c2d arch,kern,sim: Use a map to map syscall flags.
Use a std::map to map target syscall flag bits to host flag bits. This
avoids having to track the number of elements in the map separately.

Change-Id: I43bd54f5286f11b9635d46240a55742ddfdb0901
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45899
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-28 00:46:56 +00:00
Daniel R. Carvalho
71460cb13e sim,misc: Rename Int namespace as as_int
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

sim_clock::Int became sim_clock::as_int.

"as_int" was chosen because "int" is a reserved
keyword, and this namespace acts as a selector of
how to read the internal variables.

Another possibility to resolve this would be to
remove the namespaces "Float" and "Int" and use
unions instead.

Change-Id: I65f47608d2212424bed1731c7f53d242d5a7d89a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45436
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
c487767cff sim,misc: Rename Float namespace as as_float
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

sim_clock::Float became sim_clock::as_float.

"as_float" was chosen because "float" is a reserved
keywords, and this namespace acts as a selector of
how to read the internal variables. Another
possibility to resolve this would be to remove the
namespaces "Float" and "Int" and use unions instead.

Change-Id: I7b3d9c6e9ab547493d5596c7eda080a25509a730
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45435
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
d5ad966da5 fastmodel: Rename FastModel namespace as fastmodel
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::FastModel became ::fastmodel.

Change-Id: I48e34952287e44e3fb932e13f4d006d616c1d982
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45434
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
0c8bd5013a arch,sim: Rename GuestABI namespace as guest_abi
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::GuestABI became ::guest_abi.

Change-Id: I68700ef63479f1bb3eeab044b29dc09d86424608
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45433
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
b8ff106024 arch: Rename LockedMem namespace as locked_mem
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

GenericISA::LockedMem became GenericISA::locked_mem.

Change-Id: Ia939d8cb27ba4ba19837b7b4d7cb2819c8d5daed
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45432
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
79d6d9f9d7 arch-x86,dev: Rename DeliveryMode namespace as delivery_mode
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

X86ISA::DeliveryMode became X86ISA::delivery_mode.

Change-Id: Id1d83ba0ac7a4092ba796c608945a9cc17911430
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45431
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
e42d2a4789 arch,sim: Rename PseudoInst namespace as pseudo_inst
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::PseudoInst became ::pseudo_inst.

Change-Id: Ie5a8f82a532e5158992ca260b4a24e7c6f311be9
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45429
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
9341051b9a arch,cpu: Rename DecodeCache namespace as decode_cache
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::DecodeCache became ::decode_cache.

Change-Id: Ia2b89b3fd802aae72a391786f7ea0a045de1fc2a
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45426
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
450b679374 arch: Rename FreeBSD namespace as free_bsd
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::FreeBSD became ::free_bsd.

Change-Id: If3fc4b04e60e6e1e790962dc81744ec7f712d8a6
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45419
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
3bc93bb930 arch: Rename Linux namespace as linux
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::Linux became ::linux.

Change-Id: I3c34790530464b42ded795ce5b78719387a79a00
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45418
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 23:08:21 +00:00
Daniel R. Carvalho
0967a43c10 misc: Rename SimClock namespace as sim_clock
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::SimClock became ::sim_clock.

Change-Id: I25b8cfc93f283081bc2add9fdef6fec7d7ff3846
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45402
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
cbffc598f2 arch-x86: Rename X86Macroop namespace as x86_macroop
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

X86Macroop became x86_macroop.

Ideally, this should probably be moved to inside the
X86ISA namespace, and renamed accordingly, but a macroop
namespace would probably generate a lot of conflicts.

Change-Id: I06bc0f33a4c1d95492df9397d7d70e5316b1b96b
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45400
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
b0df79904a arch-x86: Rename ConditionTests namespace as condition_tests
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

X86ISA::ConditionTests became X86ISA::condition_tests.

Change-Id: I95c99f9f65995653c48c5562872ebfc52ea7438c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45399
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
96289fdf5b arch-x86: Rename IntelMP namespace as intelmp
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

X86ISA::IntelMP became X86ISA::intelmp.

Change-Id: I800ddba673aa51574c1f4a63ad57721c9d0a0c10
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45398
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
2a3b729b55 arch-x86: Rename SMBios namespace as smbios
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

X86ISA::SMBios became X86ISA::smbios.

Change-Id: Ifc90a7833562801999941e038a6267070fcddcac
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45397
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Daniel R. Carvalho
3016478068 base-stats: Rename Units namespace as units
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

Stats::Units became Stats::units.

Change-Id: I9ce855b291db122d952098a090a2984b42152850
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45415
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-05-26 22:30:33 +00:00
Bobby R. Bruce
6f1c1bccc0 arch-riscv: Fix struct causing compilation errors in clang-11
Clang 11 threw the following error: `anonymous non-C-compatible type
given name for linkage purposes by typedef declaration; add a tag name
here`.

Clang 11 enforces a restriction on giving non-C-compatible anonymous
structs a typedef name for linking purposes. This change to the C++
standard is discussed here http://wg21.link/p1766r1 and has been
retroactively applied to all C++ standard versions.

Change-Id: I87d84b9a3a842066cd4f61968ceee3fcad267b6f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45800
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-26 21:06:55 +00:00
Gabe Black
213c9186de arch,cpu: Make the decoder width a property of the decoder.
In this context, the decoder width is the number of bytes that are fed
into the decoder at once. This is frequently the same as the size of an
instruction, but in instructions with occasionally variable instruction
sizes (ARM, RISCV), or extremely variable instruction sizes (x86) there
may be no relation.

Rather than determining the amount of data to feed to the decoder based
on a MachInst type defined by each ISA, this new interface adds some new
properties to the base InstDecoder class each arch specific decoder
inherits from. These are the size of the incoming buffer, a pointer to
wherever that data should end up, and a mask for masking a PC value so
it aligns with the instruction size.

These values are filled in by a templated InstDecoder constructor which
is templated based on what would have historically been the MachInst
type.

Because the "moreBytes" method would historically accept a parameter of
type MachInst, this parameter has also been eliminated. Now, the
decoder's parent object should use the pointer and size values to fill
in the buffer moreBytes reads. Then when moreBytes is called, it just
uses the buffer without having to show what its type is externally.

Change-Id: I0642cdb6a61e152441ca4ce47d748639175cda90
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40175
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-26 00:31:54 +00:00
Gabe Black
b783a62fb8 arch-arm: De-macrofy arch/arm/kvm/arm_cpu.cc.
Replace macros with inline functions.

Change-Id: I26571959152aed5f62c543e62750e564fe27bf28
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45879
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-25 20:08:17 +00:00
Gabe Black
c76fa4d39e arch-sparc: Create a local port proxy for functional accesses.
Don't retrieve one from the thread context since it's just as easy to
make one from scratch.

Change-Id: I46a812df656a553cc0bd94f61a371b595412a9b3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45904
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-05-25 16:57:45 +00:00
Daniel R. Carvalho
8bb0dd3ab9 arch-x86: Rename RomLabels namespace as rom_labels
As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

RomLabels became rom_labels.

Change-Id: I972409ab33c595baaf845bf11f2f450ab5938d54
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45396
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-25 09:22:17 +00:00
Gabe Black
62610709df cpu,fastmodel: Get rid of the getSendFunctional method.
Change-Id: Ib901f6a37220357fe9f1863f12ee18daed31a538
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45865
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-25 08:24:30 +00:00
Gabe Black
41e2511259 misc: Stop using BaseCPU::getSendFunctional.
This method is no longer used, and has been replaced by the
ThreadContext::sendFunctional method.

Change-Id: I5a37f44d922245f681b6185c27232150a4eea4f0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45864
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
2021-05-25 08:23:49 +00:00
Gabe Black
c32ec6f21e fastmodel: Implement ThreadContext::sendFunctional.
This change provides a custom implementation for the
ThreadContext::sendFunctional method.

Change-Id: Idffb4efc509dd63c852ada0768435bf653bd1854
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45862
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-24 22:45:28 +00:00
Gabe Black
1a33023815 arch-x86: Work around a bug in g++ 6 and 7.
These versions of g++ don't handle parameter pack expansion correctly
when there is a parameter pack defined at the class level and then one
which is defined by the constructor itself. Even though it knows what
the outter parameter pack contains, it still re-assigns it to be empty
and puts all arguments into the later parameter pack.

To work around this problem, we will explicitly put the class level
parameters into a tuple, which we then have to go through extra
acrobatics to explode and pass into base class constructors.

That also means that in all subclasses, the arguments which go into the
tuple need to be wrapped in {}s to group them into constructor arguments
for the tuple.

Change-Id: I3139eebd7042b02f50862d88be5c940583a2a809
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45820
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-21 23:48:31 +00:00
Daniel R. Carvalho
17580efbd7 arch: Rename freebsd loader variables as freebsdLoader
Pave the way for a loader namespace.

Change-Id: Ief6f54cc49840fb6c156d56ba3da52dc0a995ac8
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45423
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-21 23:10:39 +00:00
Daniel R. Carvalho
10c0fb84ad arch: Rename some linux loader variables as linuxLoader
Pave the way for a loader namespace.

Change-Id: Ie7c811e74424063ff773569e7ad9df9dde166d4f
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45422
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-05-21 23:10:39 +00:00
Giacomo Travaglini
14b616d440 arch: Make MMU::flushAll virtual
This is enabling ISA specific MMUs to reimplement the flushing
according to their TLB structure

Change-Id: Ic407ab95137b299206cb94926fb69d8898ed33f8
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45779
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-21 08:32:25 +00:00
Giacomo Travaglini
da01b59a1c arch-arm: Stop using the DmaPort in the TableWalker
Using a custom TableWalker port instead

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: I9e77324569ef0f74f6c8a3941f90bc988abf3c57
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45599
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-21 08:32:25 +00:00
Gabe Black
ea46bfee0f arch-riscv: When an inst generates a fault, return it immediately.
When a fault is generated, it needs to be returned, and nothing else
should be done. There's no point in keeping it around and having to
check over and over if there was a fault and if other parts of the
execute functions should be skipped.

This simplifies the logic a bit which should speed up execution, and
also makes life easier for the compiler since behavior is obvious and
doesn't have to be deduced from possible data values and ifs.

Change-Id: I2004c7d22ac6222e1ef2acb51d49b4eb2e60b144
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45520
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Ayaz Akram <yazakram@ucdavis.edu>
2021-05-20 23:42:13 +00:00
Gabe Black
4abe9ac08b misc: Switch away from the deprecated UNIT_* macros.
Expand the macros in place.

Change-Id: I5dba512b99a1204c23a995e112248b86523b77c8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45560
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-19 21:42:34 +00:00
Giacomo Travaglini
a84a15ab17 arch-arm: Fix FEAT_VMID16 for Self Hosted debug
The existing code was querying the vmidbits but it was not checking the
VTCR_EL2.VS bit, which dynamically enables/disables VMID16

Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Change-Id: Id1e7df758a636267173c4fcd4db99e5834f21ee9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45659
Reviewed-by: Richard Cooper <richard.cooper@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-19 08:46:58 +00:00
Philip Metzler
157e7e2e3b fastmodel: Fix scx_get_parameter_list for ARM fastmodels.
The first non-critical piece of this CL removes the unused self
from the Python function signature.

Then also includes "stl.h" from pybind11 to allow the
implicit conversion from std::map<std::string, std::string>
to a Python dict (otherwise there will be a runtime (not compile time)
error when calling the function.

As the current implementation always throws an error because of the
missing stl.h I don't believe anyone is using this function, and as such
it should be safe to just change the signature of
scx_get_parameter_list.

Change-Id: Ib3202b2d4d1b8418a4adf54739fe389d4ee07743
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45622
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-05-18 14:06:52 +00:00