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fastmodel: Rename FastModel namespace as fastmodel

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As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

::FastModel became ::fastmodel.

Change-Id: I48e34952287e44e3fb932e13f4d006d616c1d982
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45434
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Gabe Black <gabe.black@gmail.com>
This commit is contained in:
Daniel R. Carvalho
2021-05-07 15:19:54 -03:00
committed by Daniel Carvalho
parent 0c8bd5013a
commit d5ad966da5
27 changed files with 89 additions and 65 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
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@@ -38,7 +38,7 @@ from m5.util.fdthelper import FdtNode, FdtPropertyWords
class FastModelCortexA76(IrisBaseCPU):
type = 'FastModelCortexA76'
cxx_class = 'FastModel::CortexA76'
cxx_class = 'fastmodel::CortexA76'
cxx_header = 'arch/arm/fastmodel/CortexA76/cortex_a76.hh'
cntfrq = Param.UInt64(0x1800000, "Value for the CNTFRQ timer register")
@@ -136,7 +136,7 @@ class FastModelCortexA76(IrisBaseCPU):
class FastModelCortexA76Cluster(SimObject):
type = 'FastModelCortexA76Cluster'
cxx_class = 'FastModel::CortexA76Cluster'
cxx_class = 'fastmodel::CortexA76Cluster'
cxx_header = 'arch/arm/fastmodel/CortexA76/cortex_a76.hh'
cores = VectorParam.FastModelCortexA76(
@@ -366,7 +366,7 @@ class FastModelCortexA76Cluster(SimObject):
class FastModelScxEvsCortexA76x1(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x1'
cxx_class = 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x1Types>'
cxx_class = 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x1Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
@@ -377,7 +377,7 @@ class FastModelCortexA76x1(FastModelCortexA76Cluster):
class FastModelScxEvsCortexA76x2(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x2'
cxx_class = 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x2Types>'
cxx_class = 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x2Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
@@ -389,7 +389,7 @@ class FastModelCortexA76x2(FastModelCortexA76Cluster):
class FastModelScxEvsCortexA76x3(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x3'
cxx_class = 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x3Types>'
cxx_class = 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x3Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'
@@ -402,7 +402,7 @@ class FastModelCortexA76x3(FastModelCortexA76Cluster):
class FastModelScxEvsCortexA76x4(SystemC_ScModule):
type = 'FastModelScxEvsCortexA76x4'
cxx_class = 'FastModel::ScxEvsCortexA76<FastModel::ScxEvsCortexA76x4Types>'
cxx_class = 'fastmodel::ScxEvsCortexA76<fastmodel::ScxEvsCortexA76x4Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexA76/evs.hh'

5
src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
View File

@@ -33,7 +33,8 @@
#include "sim/core.hh"
#include "systemc/tlm_bridge/gem5_to_tlm.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
void
@@ -196,4 +197,4 @@ CortexA76Cluster::getPort(const std::string &if_name, PortID idx)
}
}
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
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@@ -39,7 +39,8 @@
class BaseCPU;
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// The fast model exports a class called scx_evs_CortexA76x1 which represents
@@ -106,6 +107,6 @@ CortexA76::set_evs_param(const std::string &n, T val)
cluster->set_evs_param(path + "." + n, val);
}
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_CORTEXA76_CORETEX_A76_HH__

5
src/arch/arm/fastmodel/CortexA76/evs.cc
View File

@@ -34,7 +34,8 @@
#include "sim/core.hh"
#include "systemc/tlm_bridge/gem5_to_tlm.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
template <class Types>
@@ -153,4 +154,4 @@ template class ScxEvsCortexA76<ScxEvsCortexA76x2Types>;
template class ScxEvsCortexA76<ScxEvsCortexA76x3Types>;
template class ScxEvsCortexA76<ScxEvsCortexA76x4Types>;
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/CortexA76/evs.hh
View File

@@ -47,7 +47,8 @@
#include "systemc/ext/core/sc_module.hh"
#include "systemc/tlm_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
class CortexA76Cluster;
@@ -147,6 +148,6 @@ struct ScxEvsCortexA76x4Types
using ScxEvsCortexA76x4 = ScxEvsCortexA76<ScxEvsCortexA76x4Types>;
extern template class ScxEvsCortexA76<ScxEvsCortexA76x4Types>;
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_CORTEXA76_EVS_HH__

5
src/arch/arm/fastmodel/CortexA76/thread_context.cc
View File

@@ -32,7 +32,8 @@
#include "iris/detail/IrisCppAdapter.h"
#include "iris/detail/IrisObjects.h"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
CortexA76TC::CortexA76TC(::BaseCPU *cpu, int id, System *system,
@@ -952,4 +953,4 @@ Iris::ThreadContext::IdxNameMap CortexA76TC::vecRegIdxNameMap({
std::vector<iris::MemorySpaceId> CortexA76TC::bpSpaceIds;
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/CortexA76/thread_context.hh
View File

@@ -30,7 +30,8 @@
#include "arch/arm/fastmodel/iris/thread_context.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// This ThreadContext class translates accesses to state using gem5's native
@@ -65,6 +66,6 @@ class CortexA76TC : public Iris::ThreadContext
const std::vector<iris::MemorySpaceId> &getBpSpaceIds() const override;
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_CORTEXA76_THREAD_CONTEXT_HH__

12
src/arch/arm/fastmodel/CortexR52/FastModelCortexR52.py
View File

@@ -36,7 +36,7 @@ from m5.objects.SystemC import SystemC_ScModule
class FastModelCortexR52(IrisBaseCPU):
type = 'FastModelCortexR52'
cxx_class = 'FastModel::CortexR52'
cxx_class = 'fastmodel::CortexR52'
cxx_header = 'arch/arm/fastmodel/CortexR52/cortex_r52.hh'
evs = Parent.evs
@@ -96,7 +96,7 @@ class FastModelCortexR52(IrisBaseCPU):
class FastModelCortexR52Cluster(SimObject):
type = 'FastModelCortexR52Cluster'
cxx_class = 'FastModel::CortexR52Cluster'
cxx_class = 'fastmodel::CortexR52Cluster'
cxx_header = 'arch/arm/fastmodel/CortexR52/cortex_r52.hh'
cores = VectorParam.FastModelCortexR52(
@@ -171,7 +171,7 @@ class FastModelCortexR52Cluster(SimObject):
class FastModelScxEvsCortexR52x1(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x1'
cxx_class = 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x1Types>'
cxx_class = 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x1Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
@@ -182,7 +182,7 @@ class FastModelCortexR52x1(FastModelCortexR52Cluster):
class FastModelScxEvsCortexR52x2(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x2'
cxx_class = 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x2Types>'
cxx_class = 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x2Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
@@ -194,7 +194,7 @@ class FastModelCortexR52x2(FastModelCortexR52Cluster):
class FastModelScxEvsCortexR52x3(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x3'
cxx_class = 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x3Types>'
cxx_class = 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x3Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'
@@ -207,7 +207,7 @@ class FastModelCortexR52x3(FastModelCortexR52Cluster):
class FastModelScxEvsCortexR52x4(SystemC_ScModule):
type = 'FastModelScxEvsCortexR52x4'
cxx_class = 'FastModel::ScxEvsCortexR52<FastModel::ScxEvsCortexR52x4Types>'
cxx_class = 'fastmodel::ScxEvsCortexR52<fastmodel::ScxEvsCortexR52x4Types>'
cxx_template_params = [ 'class Types' ]
cxx_header = 'arch/arm/fastmodel/CortexR52/evs.hh'

5
src/arch/arm/fastmodel/CortexR52/cortex_r52.cc
View File

@@ -33,7 +33,8 @@
#include "sim/core.hh"
#include "systemc/tlm_bridge/gem5_to_tlm.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
void
@@ -152,4 +153,4 @@ CortexR52Cluster::getPort(const std::string &if_name, PortID idx)
}
}
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/CortexR52/cortex_r52.hh
View File

@@ -39,7 +39,8 @@
class BaseCPU;
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// The fast model exports a class called scx_evs_CortexR52x1 which represents
@@ -104,6 +105,6 @@ CortexR52::set_evs_param(const std::string &n, T val)
cluster->set_evs_param(path + "." + n, val);
}
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_CORTEXR52_CORETEX_R52_HH__

5
src/arch/arm/fastmodel/CortexR52/evs.cc
View File

@@ -33,7 +33,8 @@
#include "sim/core.hh"
#include "systemc/tlm_bridge/gem5_to_tlm.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
template <class Types>
@@ -131,4 +132,4 @@ template class ScxEvsCortexR52<ScxEvsCortexR52x2Types>;
template class ScxEvsCortexR52<ScxEvsCortexR52x3Types>;
template class ScxEvsCortexR52<ScxEvsCortexR52x4Types>;
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/CortexR52/evs.hh
View File

@@ -49,7 +49,8 @@
#include "systemc/ext/core/sc_module.hh"
#include "systemc/tlm_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
class CortexR52Cluster;
@@ -181,6 +182,6 @@ struct ScxEvsCortexR52x4Types
using ScxEvsCortexR52x4 = ScxEvsCortexR52<ScxEvsCortexR52x4Types>;
extern template class ScxEvsCortexR52<ScxEvsCortexR52x4Types>;
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_CORTEXR52_EVS_HH__

5
src/arch/arm/fastmodel/CortexR52/thread_context.cc
View File

@@ -32,7 +32,8 @@
#include "iris/detail/IrisCppAdapter.h"
#include "iris/detail/IrisObjects.h"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
CortexR52TC::CortexR52TC(
@@ -193,4 +194,4 @@ Iris::ThreadContext::IdxNameMap CortexR52TC::ccRegIdxNameMap({
std::vector<iris::MemorySpaceId> CortexR52TC::bpSpaceIds;
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/CortexR52/thread_context.hh
View File

@@ -30,7 +30,8 @@
#include "arch/arm/fastmodel/iris/thread_context.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// This ThreadContext class translates accesses to state using gem5's native
@@ -104,6 +105,6 @@ class CortexR52TC : public Iris::ThreadContext
}
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_CORTEXR52_THREAD_CONTEXT_HH__

4
src/arch/arm/fastmodel/FastModel.py
View File

@@ -93,7 +93,7 @@ class ScResponsePort(Port):
class AmbaToTlmBridge64(SystemC_ScModule):
type = 'AmbaToTlmBridge64'
cxx_class = 'FastModel::AmbaToTlmBridge64'
cxx_class = 'fastmodel::AmbaToTlmBridge64'
cxx_header = 'arch/arm/fastmodel/amba_to_tlm_bridge.hh'
amba = AmbaTargetSocket(64, 'AMBA PV target socket')
@@ -101,7 +101,7 @@ class AmbaToTlmBridge64(SystemC_ScModule):
class AmbaFromTlmBridge64(SystemC_ScModule):
type = 'AmbaFromTlmBridge64'
cxx_class = 'FastModel::AmbaFromTlmBridge64'
cxx_class = 'fastmodel::AmbaFromTlmBridge64'
cxx_header = 'arch/arm/fastmodel/amba_from_tlm_bridge.hh'
tlm = TlmTargetSocket(64, 'TLM target socket')

4
src/arch/arm/fastmodel/GIC/FastModelGIC.py
View File

@@ -66,7 +66,7 @@ class VectorGicv3CommsInitiatorSocket(VectorPort):
class SCFastModelGIC(SystemC_ScModule):
type = 'SCFastModelGIC'
cxx_class = 'FastModel::SCGIC'
cxx_class = 'fastmodel::SCGIC'
cxx_header = 'arch/arm/fastmodel/GIC/gic.hh'
enabled = Param.Bool(True, "Enable GICv3 functionality; when false the "
@@ -464,7 +464,7 @@ class SCFastModelGIC(SystemC_ScModule):
class FastModelGIC(BaseGic):
type = 'FastModelGIC'
cxx_class = 'FastModel::GIC'
cxx_class = 'fastmodel::GIC'
cxx_header = 'arch/arm/fastmodel/GIC/gic.hh'
sc_gic = Param.SCFastModelGIC(SCFastModelGIC(),

5
src/arch/arm/fastmodel/GIC/gic.cc
View File

@@ -31,7 +31,8 @@
#include "params/FastModelGIC.hh"
#include "params/SCFastModelGIC.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
int
@@ -357,4 +358,4 @@ GIC::supportsVersion(GicVersion version)
(version == GicVersion::GIC_V4 && scGIC->params().has_gicv4_1);
}
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/GIC/gic.hh
View File

@@ -43,7 +43,8 @@
#include "systemc/ext/core/sc_module_name.hh"
#include "systemc/sc_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// The fast model exports a class called scx_evs_GIC which represents
@@ -135,6 +136,6 @@ class GIC : public BaseGic
Tick write(PacketPtr pkt) override { return 0; }
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_GIC_GIC_HH__

2
src/arch/arm/fastmodel/PL330_DMAC/FastModelPL330.py
View File

@@ -30,7 +30,7 @@ from m5.objects.SystemC import SystemC_ScModule
class FastModelPL330(SystemC_ScModule):
type = 'FastModelPL330'
cxx_class = 'FastModel::PL330'
cxx_class = 'fastmodel::PL330'
cxx_header = 'arch/arm/fastmodel/PL330_DMAC/pl330.hh'
clock = Param.Frequency("Clock frequency")

5
src/arch/arm/fastmodel/PL330_DMAC/pl330.cc
View File

@@ -32,7 +32,8 @@
#include "params/FastModelPL330.hh"
#include "sim/core.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
PL330::PL330(const FastModelPL330Params &params,
@@ -258,4 +259,4 @@ PL330::start_of_simulation()
clockRateControl->set_mul_div(sim_clock::Int::s, clockPeriod);
}
} // namespace FastModel
} // namespace fastmodel

5
src/arch/arm/fastmodel/PL330_DMAC/pl330.hh
View File

@@ -46,7 +46,8 @@
#include "systemc/ext/core/sc_module_name.hh"
#include "systemc/sc_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
class PL330 : public scx_evs_PL330
@@ -86,6 +87,6 @@ class PL330 : public scx_evs_PL330
void start_of_simulation() override;
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_PL330_PL330_HH__

9
src/arch/arm/fastmodel/amba_from_tlm_bridge.cc
View File

@@ -29,7 +29,8 @@
#include "params/AmbaFromTlmBridge64.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
AmbaFromTlmBridge64::AmbaFromTlmBridge64(const char *name) :
@@ -51,10 +52,10 @@ AmbaFromTlmBridge64::gem5_getPort(const std::string &if_name, int idx)
}
}
} // namespace FastModel
} // namespace fastmodel
FastModel::AmbaFromTlmBridge64 *
fastmodel::AmbaFromTlmBridge64 *
AmbaFromTlmBridge64Params::create() const
{
return new FastModel::AmbaFromTlmBridge64(name.c_str());
return new fastmodel::AmbaFromTlmBridge64(name.c_str());
}

5
src/arch/arm/fastmodel/amba_from_tlm_bridge.hh
View File

@@ -35,7 +35,8 @@
#include "arch/arm/fastmodel/amba_ports.hh"
#include "systemc/tlm_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// A wrapper around the fast model AMBA -> TLM bridge which provides
@@ -52,6 +53,6 @@ class AmbaFromTlmBridge64 : public amba_pv::amba_pv_from_tlm_bridge<64>
sc_gem5::TlmTargetWrapper<64> tlmWrapper;
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_AMBA_FROM_TLM_BRIDGE_HH__

5
src/arch/arm/fastmodel/amba_ports.hh
View File

@@ -35,7 +35,8 @@
#include "systemc/tlm_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
typedef sc_gem5::TlmInitiatorWrapper<
@@ -43,6 +44,6 @@ typedef sc_gem5::TlmInitiatorWrapper<
typedef sc_gem5::TlmTargetWrapper<
64, amba_pv::amba_pv_protocol_types> AmbaTarget;
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_AMBA_PORTS_HH__

9
src/arch/arm/fastmodel/amba_to_tlm_bridge.cc
View File

@@ -65,7 +65,8 @@ struct FarAtomicOpFunctor : public AtomicOpFunctor
}
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
AmbaToTlmBridge64::AmbaToTlmBridge64(const sc_core::sc_module_name& name) :
@@ -165,10 +166,10 @@ AmbaToTlmBridge64::maybeSetupAtomicExtension(
trans.set_extension(atomic_ex);
}
} // namespace FastModel
} // namespace fastmodel
FastModel::AmbaToTlmBridge64 *
fastmodel::AmbaToTlmBridge64 *
AmbaToTlmBridge64Params::create() const
{
return new FastModel::AmbaToTlmBridge64(name.c_str());
return new fastmodel::AmbaToTlmBridge64(name.c_str());
}

5
src/arch/arm/fastmodel/amba_to_tlm_bridge.hh
View File

@@ -35,7 +35,8 @@
#include "arch/arm/fastmodel/amba_ports.hh"
#include "systemc/tlm_port_wrapper.hh"
namespace FastModel
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
// A wrapper around the fast model TLM -> AMBA bridge which provides
@@ -64,6 +65,6 @@ class AmbaToTlmBridge64 : public amba_pv::amba_pv_to_tlm_bridge<64>
AmbaTarget ambaWrapper;
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_AMBA_TO_TLM_BRIDGE_HH__

7
src/arch/arm/fastmodel/common/signal_receiver.hh
View File

@@ -35,7 +35,10 @@
#include <functional>
namespace FastModel
#include "base/compiler.hh"
GEM5_DEPRECATED_NAMESPACE(FastModel, fastmodel);
namespace fastmodel
{
class SignalReceiver : public amba_pv::signal_slave_base<bool>
@@ -74,6 +77,6 @@ class SignalReceiver : public amba_pv::signal_slave_base<bool>
}
};
} // namespace FastModel
} // namespace fastmodel
#endif // __ARCH_ARM_FASTMODEL_COMMON_SIGNAL_RECEIVER_HH__