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arch-x86: Rename ConditionTests namespace as condition_tests

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As part of recent decisions regarding namespace
naming conventions, all namespaces will be changed
to snake case.

X86ISA::ConditionTests became X86ISA::condition_tests.

Change-Id: I95c99f9f65995653c48c5562872ebfc52ea7438c
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45399
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
This commit is contained in:
Daniel R. Carvalho
2021-05-07 15:41:49 -03:00
committed by Daniel Carvalho
parent 96289fdf5b
commit b0df79904a
4 changed files with 42 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

64
src/arch/x86/insts/microop.cc
View File

@@ -48,71 +48,71 @@ X86MicroopBase::checkCondition(uint64_t flags, int condition) const
CCFlagBits ccflags = flags;
switch(condition)
{
case ConditionTests::True:
case condition_tests::True:
return true;
case ConditionTests::ECF:
case condition_tests::ECF:
return ccflags.ecf;
case ConditionTests::EZF:
case condition_tests::EZF:
return ccflags.ezf;
case ConditionTests::SZnZF:
case condition_tests::SZnZF:
return !(!ccflags.ezf && ccflags.zf);
case ConditionTests::MSTRZ:
case condition_tests::MSTRZ:
panic("This condition is not implemented!");
case ConditionTests::STRZ:
case condition_tests::STRZ:
panic("This condition is not implemented!");
case ConditionTests::MSTRC:
case condition_tests::MSTRC:
panic("This condition is not implemented!");
case ConditionTests::STRZnEZF:
case condition_tests::STRZnEZF:
return !ccflags.ezf && ccflags.zf;
//And no interrupts or debug traps are waiting
case ConditionTests::OF:
case condition_tests::OF:
return ccflags.of;
case ConditionTests::CF:
case condition_tests::CF:
return ccflags.cf;
case ConditionTests::ZF:
case condition_tests::ZF:
return ccflags.zf;
case ConditionTests::CvZF:
case condition_tests::CvZF:
return ccflags.cf | ccflags.zf;
case ConditionTests::SF:
case condition_tests::SF:
return ccflags.sf;
case ConditionTests::PF:
case condition_tests::PF:
return ccflags.pf;
case ConditionTests::SxOF:
case condition_tests::SxOF:
return ccflags.sf ^ ccflags.of;
case ConditionTests::SxOvZF:
case condition_tests::SxOvZF:
return (ccflags.sf ^ ccflags.of) | ccflags.zf;
case ConditionTests::False:
case condition_tests::False:
return false;
case ConditionTests::NotECF:
case condition_tests::NotECF:
return !ccflags.ecf;
case ConditionTests::NotEZF:
case condition_tests::NotEZF:
return !ccflags.ezf;
case ConditionTests::NotSZnZF:
case condition_tests::NotSZnZF:
return !ccflags.ezf && ccflags.zf;
case ConditionTests::NotMSTRZ:
case condition_tests::NotMSTRZ:
panic("This condition is not implemented!");
case ConditionTests::NotSTRZ:
case condition_tests::NotSTRZ:
panic("This condition is not implemented!");
case ConditionTests::NotMSTRC:
case condition_tests::NotMSTRC:
panic("This condition is not implemented!");
case ConditionTests::STRnZnEZF:
case condition_tests::STRnZnEZF:
return !ccflags.ezf && !ccflags.zf;
//And no interrupts or debug traps are waiting
case ConditionTests::NotOF:
case condition_tests::NotOF:
return !ccflags.of;
case ConditionTests::NotCF:
case condition_tests::NotCF:
return !ccflags.cf;
case ConditionTests::NotZF:
case condition_tests::NotZF:
return !ccflags.zf;
case ConditionTests::NotCvZF:
case condition_tests::NotCvZF:
return !(ccflags.cf | ccflags.zf);
case ConditionTests::NotSF:
case condition_tests::NotSF:
return !ccflags.sf;
case ConditionTests::NotPF:
case condition_tests::NotPF:
return !ccflags.pf;
case ConditionTests::NotSxOF:
case condition_tests::NotSxOF:
return !(ccflags.sf ^ ccflags.of);
case ConditionTests::NotSxOvZF:
case condition_tests::NotSxOvZF:
return !((ccflags.sf ^ ccflags.of) | ccflags.zf);
}
panic("Unknown condition: %d\n", condition);

4
src/arch/x86/insts/microop.hh
View File

@@ -39,11 +39,13 @@
#define __ARCH_X86_INSTS_MICROOP_HH__
#include "arch/x86/insts/static_inst.hh"
#include "base/compiler.hh"
namespace X86ISA
{
namespace ConditionTests
GEM5_DEPRECATED_NAMESPACE(ConditionTests, condition_tests);
namespace condition_tests
{
enum CondTest

12
src/arch/x86/isa/microasm.isa
View File

@@ -170,13 +170,13 @@ let {{
'MSTRZ', 'STRZ', 'MSTRC',
'OF', 'CF', 'ZF', 'CvZF',
'SF', 'PF', 'SxOF', 'SxOvZF'):
assembler.symbols["C%s" % cond] = "ConditionTests::%s" % cond
assembler.symbols["nC%s" % cond] = "ConditionTests::Not%s" % cond
assembler.symbols["CSTRZnEZF"] = "ConditionTests::STRZnEZF"
assembler.symbols["CSTRnZnEZF"] = "ConditionTests::STRnZnEZF"
assembler.symbols["C%s" % cond] = "condition_tests::%s" % cond
assembler.symbols["nC%s" % cond] = "condition_tests::Not%s" % cond
assembler.symbols["CSTRZnEZF"] = "condition_tests::STRZnEZF"
assembler.symbols["CSTRnZnEZF"] = "condition_tests::STRnZnEZF"
assembler.symbols["CTrue"] = "ConditionTests::True"
assembler.symbols["CFalse"] = "ConditionTests::False"
assembler.symbols["CTrue"] = "condition_tests::True"
assembler.symbols["CFalse"] = "condition_tests::False"
for reg in ('sysenter_cs', 'sysenter_esp', 'sysenter_eip',
'star', 'lstar', 'cstar', 'sf_mask',

2
src/arch/x86/isa/microops/seqop.isa
View File

@@ -140,7 +140,7 @@ let {{
self.cond = " | ".join(flags)
self.className += "Flags"
else:
self.cond = "X86ISA::ConditionTests::True"
self.cond = "X86ISA::condition_tests::True"
def getAllocator(self, microFlags):
if not "IsLastMicroop" in microFlags: