Commit Graph

205 Commits

Author SHA1 Message Date
d138f4b71e Remove powerAnalysis bool from Dram.h 2025-05-09 16:45:54 +02:00
marcomoerz
bc8274433a Deserialize std::variant without throwing exception 2025-05-09 16:45:54 +02:00
marcomoerz
4120e9c35b Integrate DRAMUtils and new DRAMPower 2025-05-09 16:45:54 +02:00
Lukas Steiner
9b4fb96cce Merge branch 'fix/beat_byte_granularity' into 'develop'
Allow non-byte granularity for bus width

See merge request ems/astdm/modeling.dram/dram.sys.5!119
2025-04-24 14:15:46 +00:00
Lukas Steiner
1863987af3 Merge branch 'feat/remove_resource_directory' into 'develop'
Remove the concept of a resource directory

See merge request ems/astdm/modeling.dram/dram.sys.5!115
2025-04-24 14:12:23 +00:00
Lukas Steiner
2b641ca171 Merge branch 'feat/cmdmux' into 'develop'
Use std::optional in cmdMux

See merge request ems/astdm/modeling.dram/dram.sys.5!109
2025-04-24 14:05:13 +00:00
b3e24cc33a Serialize/Deserialize internal state of RefreshManagers
For gem5 checkpointing, it was needed to save the state of the refresh
managers. Otherwise, as soon as the simulation was resumed, the refresh
manager issued a huge number of refresh commands.
2025-04-17 13:59:46 +02:00
939fc90f98 Remove hard-coded subdirectory paths for configs
Previously, the subdirectories in which the sub-json files were searched
in were hardcoded. Now, DRAMSys simply searches in the directory of the
base config, making this approach more flexible.
2025-04-15 14:56:35 +02:00
a97b676b92 Remove the concept of a resource directory
The concept of a resource directory was confusing, error-prone and
was only used to specify the directory of the base config json anyway.
Therefore, remove the concept of the resource directory and use the
parent directory of the base config directly.
2025-04-15 14:56:35 +02:00
db6011425a Allow non-byte granularity for bus width 2025-04-14 13:04:49 +02:00
Jonathan Hager
b9e3d8b0bf Renamed the tlmRecorder classes 2025-04-10 10:48:40 +02:00
Jonathan Hager
8266d825f3 Moved ifs from the method body to the invocation 2025-04-10 10:21:58 +02:00
Jonathan Hager
950dbd690d Removed DramRecordable import 2025-03-26 13:58:14 +01:00
Jonathan Hager
94954c8697 Switch from shared_ptrs back to references
Dram and Controller hold a const pointer instead of a reference, so that
it can be set to null, if database recording is disabled
2025-03-26 13:53:23 +01:00
Jonathan Hager
d773abc7ce Updated unit tests for HBM2
This is necessary, as recording the phases with tlmRecorders on the bus
changed the internal call order in the SystemC kernel. This leads to
different IDs in the database
2025-03-26 13:53:23 +01:00
Jonathan Hager
9c690c021c Fixed nullptr segfault if no database recording
Dram and Controller handle this case now and are initialized with a
shared_ptr pointing to null
2025-03-26 13:53:22 +01:00
Jonathan Hager
2f8c318c0e Implemented b_transport and dbg 2025-03-26 13:53:22 +01:00
Jonathan Hager
d349aafff7 Change TlmRecorderArbiter to TlmRecorderController 2025-03-26 13:53:22 +01:00
Jonathan Hager
86281cc6d3 Removed ControllerRecordable 2025-03-26 13:53:22 +01:00
Jonathan Hager
5b7dcbcc1c Moved TlmRecorder from reference to smart pointer 2025-03-26 13:53:22 +01:00
Jonathan Hager
0479184f72 Split the bandwidth recording in two modules
This allows separate recording of the bandwidth between Arbiter -
Controller and Controller - Dram
2025-03-26 13:53:22 +01:00
Jonathan Hager
f1445ab851 WIP: Moved BufferDepth out of ControllerRecordable 2025-03-26 13:53:22 +01:00
Jonathan Hager
9a563e78d5 Moved Bandwidth recording out of the Controller 2025-03-26 13:53:22 +01:00
Jonathan Hager
c45137958d Removed DramRecordable 2025-03-26 13:53:11 +01:00
Jonathan Hager
d5862e55ea Moved DramRecordable logic to Dram 2025-03-26 13:52:19 +01:00
Jonathan Hager
0975e52f5f Changed TlmRecorderWrapper to simple_sockets 2025-03-26 13:52:19 +01:00
Jonathan Hager
8b64cbf047 Added TlmRecorderWrapper to handle database logic 2025-03-26 13:52:18 +01:00
c1f4655d19 Fix delays in traffic generators 2025-03-26 09:59:51 +01:00
98eae7fcf4 Fix the forward declaration of the Dram class 2025-03-25 19:18:09 +01:00
aafb704cf8 Use std::optional in cmdMux 2025-03-24 13:39:50 +01:00
e9643e7938 Fix issue with stack id 2025-03-03 16:58:51 +01:00
76e8dba113 Do not align address to minimum burst length 2025-02-26 17:10:11 +01:00
5b76e52cd4 Do not create empty database file when it does not exist 2025-02-26 09:28:36 +01:00
6861576550 Implement tCCDR for HBM2 and fix bug with SID 2025-02-21 14:18:30 +01:00
b9fc47d1fe When project is top-level, force C++17 2025-02-13 11:14:55 +01:00
Lukas Steiner
f223e6c500 Merge branch 'feat/hbm3_sid' into 'develop'
Feat/hbm3 sid

See merge request ems/astdm/modeling.dram/dram.sys.5!96
2025-01-28 09:04:16 +00:00
e57ce9cc86 Use controller clock as interface clock in initiators 2025-01-24 15:55:40 +01:00
581794b970 Allow responses to be sent back-to-back 2025-01-24 14:58:06 +01:00
ba94d9fd84 Have a one cycle END_RESP delay in the standard initiator 2025-01-24 14:43:06 +01:00
0a478dbdc5 Issue a warning if ThinkDelayFw is 0 2025-01-24 14:18:40 +01:00
007c55e878 Use think delay as miminum END_REQ delay
When the controller accepts requests in the same clock cycle as it
handles them, undeterministic simulations can occur as the outcome
depends on if the new request is accepted before the controllerMethod
is called or not.

Therefore, a minimum delay of one clock cylce should be used to always
handle request only in the next clock cycle, removing the disambiguity.
2025-01-24 14:18:39 +01:00
Lukas Steiner
1b50709591 Merge branch 'feat/new_checkers' into 'develop'
Use new timing checkers

See merge request ems/astdm/modeling.dram/dram.sys.5!95
2025-01-17 14:23:24 +00:00
d71e649447 Fix the verification of generator parameters
Also, clamp the read write ratio instead of generating an error
2025-01-14 14:55:11 +01:00
7a8633d36e Implement stack ID for HBM3 2025-01-13 15:36:05 +01:00
ed709b82d4 Integrate new Timing Checker 2025-01-13 10:24:08 +01:00
marcomoerz
5b52015c75 changed namespace
DRAMSys::DRAMPower to DRAMPower::DRAMPower
2025-01-10 14:08:50 +01:00
83cc41e318 Minor refactorings of CMakeList files 2025-01-09 08:12:49 +00:00
6d6c8c595f Clean up private/public linking 2024-12-20 17:40:16 +01:00
ffc94a73cb Update dependency versions 2024-12-20 17:40:15 +01:00
e2342350d0 Minor improvements on package handling 2024-12-20 17:40:15 +01:00