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Renamed the tlmRecorder classes

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This commit is contained in:
Jonathan Hager
2025-04-10 10:48:40 +02:00
parent 8266d825f3
commit b9e3d8b0bf
7 changed files with 64 additions and 64 deletions
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4
src/libdramsys/CMakeLists.txt
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@@ -39,8 +39,8 @@
add_library(libdramsys
DRAMSys/common/DebugManager.cpp
DRAMSys/common/TlmRecorder.cpp
DRAMSys/common/TlmRecorderController.cpp
DRAMSys/common/TlmRecorderDram.cpp
DRAMSys/common/TlmATRecorder.cpp
DRAMSys/common/DramATRecorder.cpp
DRAMSys/common/dramExtensions.cpp
DRAMSys/common/utils.cpp
DRAMSys/configuration/memspec/MemSpec.cpp

22
src/libdramsys/DRAMSys/common/TlmRecorderDram.cpp → src/libdramsys/DRAMSys/common/DramATRecorder.cpp
View File

@@ -1,4 +1,4 @@
#include "TlmRecorderDram.h"
#include "DramATRecorder.h"
#include "DRAMSys/configuration/memspec/MemSpec.h"
#include "DRAMSys/controller/Command.h"
#include "DRAMSys/simulation/SimConfig.h"
@@ -9,7 +9,7 @@
namespace DRAMSys
{
TlmRecorderDram::TlmRecorderDram(const sc_core::sc_module_name& name,
DramATRecorder::DramATRecorder(const sc_core::sc_module_name& name,
const SimConfig& simConfig,
const MemSpec& memSpec,
TlmRecorder& tlmRecorder,
@@ -24,10 +24,10 @@ TlmRecorderDram::TlmRecorderDram(const sc_core::sc_module_name& name,
activeTimeMultiplier(memSpec.tCK / memSpec.dataRate),
enableBandwidth(enableBandwidth)
{
iSocket.register_nb_transport_bw(this, &TlmRecorderDram::nb_transport_bw);
tSocket.register_nb_transport_fw(this, &TlmRecorderDram::nb_transport_fw);
tSocket.register_b_transport(this, &TlmRecorderDram::b_transport);
tSocket.register_transport_dbg(this, &TlmRecorderDram::transport_dbg);
iSocket.register_nb_transport_bw(this, &DramATRecorder::nb_transport_bw);
tSocket.register_nb_transport_fw(this, &DramATRecorder::nb_transport_fw);
tSocket.register_b_transport(this, &DramATRecorder::b_transport);
tSocket.register_transport_dbg(this, &DramATRecorder::transport_dbg);
if (enableBandwidth && enableWindowing)
{
@@ -40,7 +40,7 @@ TlmRecorderDram::TlmRecorderDram(const sc_core::sc_module_name& name,
}
}
tlm::tlm_sync_enum TlmRecorderDram::nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_sync_enum DramATRecorder::nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
@@ -59,7 +59,7 @@ tlm::tlm_sync_enum TlmRecorderDram::nb_transport_fw(tlm::tlm_generic_payload& tr
return iSocket->nb_transport_fw(trans, phase, delay);
}
tlm::tlm_sync_enum TlmRecorderDram::nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_sync_enum DramATRecorder::nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
@@ -67,17 +67,17 @@ tlm::tlm_sync_enum TlmRecorderDram::nb_transport_bw(tlm::tlm_generic_payload& tr
return tSocket->nb_transport_bw(trans, phase, delay);
}
void TlmRecorderDram::b_transport(tlm::tlm_generic_payload& trans, sc_core::sc_time& delay)
void DramATRecorder::b_transport(tlm::tlm_generic_payload& trans, sc_core::sc_time& delay)
{
iSocket->b_transport(trans, delay);
}
unsigned int TlmRecorderDram::transport_dbg(tlm::tlm_generic_payload& trans)
unsigned int DramATRecorder::transport_dbg(tlm::tlm_generic_payload& trans)
{
return iSocket->transport_dbg(trans);
}
void TlmRecorderDram::recordBandwidth()
void DramATRecorder::recordBandwidth()
{
windowEvent.notify(windowSizeTime);
nextWindowEventTime += windowSizeTime;

18
src/libdramsys/DRAMSys/common/TlmRecorderDram.h → src/libdramsys/DRAMSys/common/DramATRecorder.h
View File

@@ -1,5 +1,5 @@
#ifndef TLMRECORDERDRAM_H
#define TLMRECORDERDRAM_H
#ifndef DRAMATRECORDER_H
#define DRAMATRECORDER_H
#include "DRAMSys/configuration/memspec/MemSpec.h"
#include "DRAMSys/simulation/SimConfig.h"
@@ -14,21 +14,21 @@
namespace DRAMSys
{
class TlmRecorderDram : public sc_core::sc_module
class DramATRecorder : public sc_core::sc_module
{
SC_HAS_PROCESS(TlmRecorderDram);
SC_HAS_PROCESS(DramATRecorder);
public:
tlm_utils::simple_initiator_socket<TlmRecorderDram> iSocket;
tlm_utils::simple_target_socket<TlmRecorderDram> tSocket;
tlm_utils::simple_initiator_socket<DramATRecorder> iSocket;
tlm_utils::simple_target_socket<DramATRecorder> tSocket;
TlmRecorderDram(const sc_core::sc_module_name& name,
DramATRecorder(const sc_core::sc_module_name& name,
const SimConfig& simConfig,
const MemSpec& memspec,
TlmRecorder& tlmRecorder,
bool enableBandwidth);
~TlmRecorderDram() = default;
~DramATRecorder() = default;
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
@@ -58,4 +58,4 @@ private:
} // namespace DRAMSys
#endif // TLMRECORDERDRAM_H
#endif // DRAMATRECORDER_H

22
src/libdramsys/DRAMSys/common/TlmRecorderController.cpp → src/libdramsys/DRAMSys/common/TlmATRecorder.cpp
View File

@@ -1,4 +1,4 @@
#include "TlmRecorderController.h"
#include "TlmATRecorder.h"
#include "DRAMSys/configuration/memspec/MemSpec.h"
#include "DRAMSys/controller/Command.h"
@@ -10,7 +10,7 @@
namespace DRAMSys
{
TlmRecorderController::TlmRecorderController(const sc_core::sc_module_name& name,
TlmATRecorder::TlmATRecorder(const sc_core::sc_module_name& name,
const SimConfig& simConfig,
const MemSpec& memSpec,
TlmRecorder& tlmRecorder,
@@ -26,10 +26,10 @@ TlmRecorderController::TlmRecorderController(const sc_core::sc_module_name& name
activeTimeMultiplier(memSpec.tCK / memSpec.dataRate),
enableBandwidth(enableBandwidth)
{
iSocket.register_nb_transport_bw(this, &TlmRecorderController::nb_transport_bw);
tSocket.register_nb_transport_fw(this, &TlmRecorderController::nb_transport_fw);
tSocket.register_b_transport(this, &TlmRecorderController::b_transport);
tSocket.register_transport_dbg(this, &TlmRecorderController::transport_dbg);
iSocket.register_nb_transport_bw(this, &TlmATRecorder::nb_transport_bw);
tSocket.register_nb_transport_fw(this, &TlmATRecorder::nb_transport_fw);
tSocket.register_b_transport(this, &TlmATRecorder::b_transport);
tSocket.register_transport_dbg(this, &TlmATRecorder::transport_dbg);
if (enableBandwidth && enableWindowing)
{
@@ -42,7 +42,7 @@ TlmRecorderController::TlmRecorderController(const sc_core::sc_module_name& name
}
}
tlm::tlm_sync_enum TlmRecorderController::nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_sync_enum TlmATRecorder::nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
@@ -56,7 +56,7 @@ tlm::tlm_sync_enum TlmRecorderController::nb_transport_fw(tlm::tlm_generic_paylo
return iSocket->nb_transport_fw(trans, phase, delay);
}
tlm::tlm_sync_enum TlmRecorderController::nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_sync_enum TlmATRecorder::nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay)
{
@@ -70,17 +70,17 @@ tlm::tlm_sync_enum TlmRecorderController::nb_transport_bw(tlm::tlm_generic_paylo
return tSocket->nb_transport_bw(trans, phase, delay);
}
void TlmRecorderController::b_transport(tlm::tlm_generic_payload& trans, sc_core::sc_time& delay)
void TlmATRecorder::b_transport(tlm::tlm_generic_payload& trans, sc_core::sc_time& delay)
{
iSocket->b_transport(trans, delay);
}
unsigned int TlmRecorderController::transport_dbg(tlm::tlm_generic_payload& trans)
unsigned int TlmATRecorder::transport_dbg(tlm::tlm_generic_payload& trans)
{
return iSocket->transport_dbg(trans);
}
void TlmRecorderController::recordBandwidth()
void TlmATRecorder::recordBandwidth()
{
windowEvent.notify(windowSizeTime);
nextWindowEventTime += windowSizeTime;

18
src/libdramsys/DRAMSys/common/TlmRecorderController.h → src/libdramsys/DRAMSys/common/TlmATRecorder.h
View File

@@ -1,5 +1,5 @@
#ifndef TLMRECORDERCONTROLLER_H
#define TLMRECORDERCONTROLLER_H
#ifndef TLMATRECORDER_H
#define TLMATRECORDER_H
#include "DRAMSys/configuration/memspec/MemSpec.h"
#include "DRAMSys/simulation/SimConfig.h"
@@ -14,21 +14,21 @@
namespace DRAMSys
{
class TlmRecorderController : public sc_core::sc_module
class TlmATRecorder : public sc_core::sc_module
{
SC_HAS_PROCESS(TlmRecorderController);
SC_HAS_PROCESS(TlmATRecorder);
public:
tlm_utils::simple_initiator_socket<TlmRecorderController> iSocket;
tlm_utils::simple_target_socket<TlmRecorderController> tSocket;
tlm_utils::simple_initiator_socket<TlmATRecorder> iSocket;
tlm_utils::simple_target_socket<TlmATRecorder> tSocket;
TlmRecorderController(const sc_core::sc_module_name& name,
TlmATRecorder(const sc_core::sc_module_name& name,
const SimConfig& simConfig,
const MemSpec& memspec,
TlmRecorder& tlmRecorder,
bool enableBandwidth);
~TlmRecorderController() = default;
~TlmATRecorder() = default;
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
@@ -59,4 +59,4 @@ private:
} // namespace DRAMSys
#endif // TLMRECORDERCONTROLLER_H
#endif // TLMATRECORDER_H

36
src/libdramsys/DRAMSys/simulation/DRAMSys.cpp
View File

@@ -121,20 +121,20 @@ DRAMSys::DRAMSys(const sc_core::sc_module_name& name, const Config::Configuratio
("TLMCheckerController" + std::to_string(i)).c_str()));
// Not recording bandwidth between Arbiter - Controller
tlmRecordersController.emplace_back(std::make_unique<TlmRecorderController>(
("TlmRecorderController" + std::to_string(i)).c_str(),
simConfig,
*memSpec,
tlmRecorders[i],
false));
tlmATRecorders.emplace_back(
std::make_unique<TlmATRecorder>(("TlmATRecorder" + std::to_string(i)).c_str(),
simConfig,
*memSpec,
tlmRecorders[i],
false));
// Recording bandwidth between Controller - DRAM
tlmRecordersDram.emplace_back(
std::make_unique<TlmRecorderDram>(("TlmRecorderDram" + std::to_string(i)).c_str(),
simConfig,
*memSpec,
tlmRecorders[i],
true));
dramATRecorders.emplace_back(
std::make_unique<DramATRecorder>(("DramATRecorder" + std::to_string(i)).c_str(),
simConfig,
*memSpec,
tlmRecorders[i],
true));
}
}
else
@@ -170,8 +170,8 @@ DRAMSys::DRAMSys(const sc_core::sc_module_name& name, const Config::Configuratio
if (simConfig.checkTLM2Protocol && simConfig.databaseRecording)
{
arbiter->iSocket.bind(controllersTlmCheckers[i]->target_socket);
controllersTlmCheckers[i]->initiator_socket.bind(tlmRecordersController[i]->tSocket);
tlmRecordersController[i]->iSocket.bind(controllers[i]->tSocket);
controllersTlmCheckers[i]->initiator_socket.bind(tlmATRecorders[i]->tSocket);
tlmATRecorders[i]->iSocket.bind(controllers[i]->tSocket);
}
else if (simConfig.checkTLM2Protocol)
{
@@ -181,8 +181,8 @@ DRAMSys::DRAMSys(const sc_core::sc_module_name& name, const Config::Configuratio
}
else if (simConfig.databaseRecording)
{
arbiter->iSocket.bind(tlmRecordersController[i]->tSocket);
tlmRecordersController[i]->iSocket.bind(controllers[i]->tSocket);
arbiter->iSocket.bind(tlmATRecorders[i]->tSocket);
tlmATRecorders[i]->iSocket.bind(controllers[i]->tSocket);
}
else
{
@@ -192,8 +192,8 @@ DRAMSys::DRAMSys(const sc_core::sc_module_name& name, const Config::Configuratio
if (simConfig.databaseRecording)
{
// Controller <--> tlmRecorder <--> Dram
controllers[i]->iSocket.bind(tlmRecordersDram[i]->tSocket);
tlmRecordersDram[i]->iSocket.bind(drams[i]->tSocket);
controllers[i]->iSocket.bind(dramATRecorders[i]->tSocket);
dramATRecorders[i]->iSocket.bind(drams[i]->tSocket);
}
else
{

8
src/libdramsys/DRAMSys/simulation/DRAMSys.h
View File

@@ -41,9 +41,9 @@
#ifndef DRAMSYS_H
#define DRAMSYS_H
#include "DRAMSys/common/DramATRecorder.h"
#include "DRAMSys/common/TlmATRecorder.h"
#include "DRAMSys/common/TlmRecorder.h"
#include "DRAMSys/common/TlmRecorderController.h"
#include "DRAMSys/common/TlmRecorderDram.h"
#include "DRAMSys/common/tlm2_base_protocol_checker.h"
#include "DRAMSys/config/DRAMSysConfiguration.h"
#include "DRAMSys/controller/Controller.h"
@@ -128,8 +128,8 @@ private:
// They generate the output databases.
std::vector<TlmRecorder> tlmRecorders;
std::vector<std::unique_ptr<TlmRecorderController>> tlmRecordersController;
std::vector<std::unique_ptr<TlmRecorderDram>> tlmRecordersDram;
std::vector<std::unique_ptr<TlmATRecorder>> tlmATRecorders;
std::vector<std::unique_ptr<DramATRecorder>> dramATRecorders;
};
} // namespace DRAMSys