derek/DRAMSys
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Removed ControllerRecordable

Browse Source
This commit is contained in:
Jonathan Hager
2025-03-18 10:56:08 +01:00
parent 5b7dcbcc1c
commit 86281cc6d3
4 changed files with 0 additions and 218 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/libdramsys/CMakeLists.txt
View File

@@ -57,7 +57,6 @@ add_library(libdramsys
DRAMSys/controller/BankMachine.cpp
DRAMSys/controller/Command.cpp
DRAMSys/controller/Controller.cpp
DRAMSys/controller/ControllerRecordable.cpp
DRAMSys/controller/McConfig.cpp
DRAMSys/controller/checker/CheckerDDR3.cpp
DRAMSys/controller/checker/CheckerDDR4.cpp

127
src/libdramsys/DRAMSys/controller/ControllerRecordable.cpp
View File

@@ -1,127 +0,0 @@
/*
* Copyright (c) 2019, RPTU Kaiserslautern-Landau
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Lukas Steiner
*/
#include "ControllerRecordable.h"
#include "DRAMSys/controller/scheduler/SchedulerIF.h"
using namespace sc_core;
using namespace tlm;
namespace DRAMSys
{
ControllerRecordable::ControllerRecordable(const sc_module_name& name,
const McConfig& config,
const SimConfig& simConfig,
const MemSpec& memSpec,
const AddressDecoder& addressDecoder,
TlmRecorder& tlmRecorder) :
Controller(name, config, memSpec, simConfig, addressDecoder, tlmRecorder),
tlmRecorder(tlmRecorder),
windowSizeTime(simConfig.windowSize * memSpec.tCK),
activeTimeMultiplier(memSpec.tCK / memSpec.dataRate),
enableWindowing(simConfig.enableWindowing)
{
if (enableWindowing)
{
sensitive << windowEvent;
slidingAverageBufferDepth = std::vector<sc_time>(scheduler->getBufferDepth().size());
windowAverageBufferDepth = std::vector<double>(scheduler->getBufferDepth().size());
windowEvent.notify(windowSizeTime);
nextWindowEventTime = windowSizeTime;
}
}
tlm_sync_enum
ControllerRecordable::nb_transport_fw(tlm_generic_payload& trans, tlm_phase& phase, sc_time& delay)
{
tlmRecorder.recordPhase(trans, phase, delay);
return Controller::nb_transport_fw(trans, phase, delay);
}
tlm_sync_enum ControllerRecordable::nb_transport_bw([[maybe_unused]] tlm_generic_payload& trans,
[[maybe_unused]] tlm_phase& phase,
[[maybe_unused]] sc_time& delay)
{
SC_REPORT_FATAL("Controller", "nb_transport_bw of controller must not be called");
return TLM_ACCEPTED;
}
void ControllerRecordable::sendToFrontend(tlm_generic_payload& payload,
tlm_phase& phase,
sc_time& delay)
{
tlmRecorder.recordPhase(payload, phase, delay);
tSocket->nb_transport_bw(payload, phase, delay);
}
void ControllerRecordable::controllerMethod()
{
if (enableWindowing)
{
sc_time timeDiff = sc_time_stamp() - lastTimeCalled;
lastTimeCalled = sc_time_stamp();
const std::vector<unsigned>& bufferDepth = scheduler->getBufferDepth();
for (std::size_t index = 0; index < slidingAverageBufferDepth.size(); index++)
slidingAverageBufferDepth[index] += bufferDepth[index] * timeDiff;
if (sc_time_stamp() == nextWindowEventTime)
{
windowEvent.notify(windowSizeTime);
nextWindowEventTime += windowSizeTime;
for (std::size_t index = 0; index < slidingAverageBufferDepth.size(); index++)
{
windowAverageBufferDepth[index] = slidingAverageBufferDepth[index] / windowSizeTime;
slidingAverageBufferDepth[index] = SC_ZERO_TIME;
}
tlmRecorder.recordBufferDepth(sc_time_stamp().to_seconds(), windowAverageBufferDepth);
Controller::controllerMethod();
}
else
{
Controller::controllerMethod();
}
}
else
{
Controller::controllerMethod();
}
}
} // namespace DRAMSys

89
src/libdramsys/DRAMSys/controller/ControllerRecordable.h
View File

@@ -1,89 +0,0 @@
/*
* Copyright (c) 2019, RPTU Kaiserslautern-Landau
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Author: Lukas Steiner
*/
#ifndef CONTROLLERRECORDABLE_H
#define CONTROLLERRECORDABLE_H
#include "DRAMSys/common/TlmRecorder.h"
#include "DRAMSys/controller/Controller.h"
#include "DRAMSys/simulation/SimConfig.h"
#include <systemc>
#include <tlm>
namespace DRAMSys
{
class ControllerRecordable final : public Controller
{
public:
ControllerRecordable(const sc_core::sc_module_name& name,
const McConfig& config,
const SimConfig& simConfig,
const MemSpec& memSpec,
const AddressDecoder& addressDecoder,
TlmRecorder& tlmRecorder);
protected:
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay) override;
tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload& trans,
tlm::tlm_phase& phase,
sc_core::sc_time& delay) override;
void sendToFrontend(tlm::tlm_generic_payload& payload,
tlm::tlm_phase& phase,
sc_core::sc_time& delay) override;
void controllerMethod() override;
private:
TlmRecorder& tlmRecorder;
sc_core::sc_event windowEvent;
const sc_core::sc_time windowSizeTime;
sc_core::sc_time nextWindowEventTime;
std::vector<sc_core::sc_time> slidingAverageBufferDepth;
std::vector<double> windowAverageBufferDepth;
sc_core::sc_time lastTimeCalled = sc_core::SC_ZERO_TIME;
uint64_t lastNumberOfBeatsServed = 0;
const sc_core::sc_time activeTimeMultiplier;
const bool enableWindowing;
};
} // namespace DRAMSys
#endif // CONTROLLERRECORDABLE_H

1
src/libdramsys/DRAMSys/simulation/DRAMSys.h
View File

@@ -47,7 +47,6 @@
#include "DRAMSys/common/tlm2_base_protocol_checker.h"
#include "DRAMSys/config/DRAMSysConfiguration.h"
#include "DRAMSys/controller/Controller.h"
#include "DRAMSys/controller/ControllerRecordable.h"
#include "DRAMSys/controller/McConfig.h"
#include "DRAMSys/simulation/AddressDecoder.h"
#include "DRAMSys/simulation/Arbiter.h"