Use controller clock as interface clock in initiators

This commit is contained in:
2025-01-24 15:55:40 +01:00
parent 581794b970
commit e57ce9cc86
6 changed files with 30 additions and 27 deletions

View File

@@ -43,7 +43,7 @@ template <typename Producer> class SimpleInitiator : public Initiator
public:
SimpleInitiator(sc_core::sc_module_name const& name,
MemoryManager& memoryManager,
unsigned int clkMhz,
sc_core::sc_time interfaceClk,
std::optional<unsigned int> maxPendingReadRequests,
std::optional<unsigned int> maxPendingWriteRequests,
std::function<void()> transactionFinished,
@@ -53,7 +53,7 @@ public:
issuer(
name,
memoryManager,
clkMhz,
interfaceClk,
maxPendingReadRequests,
maxPendingWriteRequests,
[this] { return this->producer.nextRequest(); },

View File

@@ -84,6 +84,7 @@ std::unique_ptr<Initiator>
Simulator::instantiateInitiator(const DRAMSys::Config::Initiator& initiator)
{
uint64_t memorySize = dramSys->getMemSpec().getSimMemSizeInBytes();
sc_core::sc_time interfaceClk = dramSys->getMemSpec().tCK;
unsigned int defaultDataLength = dramSys->getMemSpec().defaultBytesPerBurst;
return std::visit(
@@ -94,9 +95,10 @@ Simulator::instantiateInitiator(const DRAMSys::Config::Initiator& initiator)
std::is_same_v<T, DRAMSys::Config::TrafficGeneratorStateMachine>)
{
return std::make_unique<TrafficGenerator>(config,
memoryManager,
interfaceClk,
memorySize,
defaultDataLength,
memoryManager,
finishTransaction,
terminateInitiator);
}
@@ -126,7 +128,7 @@ Simulator::instantiateInitiator(const DRAMSys::Config::Initiator& initiator)
return std::make_unique<SimpleInitiator<StlPlayer>>(config.name.c_str(),
memoryManager,
config.clkMhz,
interfaceClk,
std::nullopt,
std::nullopt,
finishTransaction,
@@ -139,7 +141,7 @@ Simulator::instantiateInitiator(const DRAMSys::Config::Initiator& initiator)
return std::make_unique<SimpleInitiator<RowHammer>>(config.name.c_str(),
memoryManager,
config.clkMhz,
interfaceClk,
1,
1,
finishTransaction,

View File

@@ -35,10 +35,14 @@
#include "TrafficGenerator.h"
#include "RandomProducer.h"
#include "SequentialProducer.h"
TrafficGenerator::TrafficGenerator(DRAMSys::Config::TrafficGeneratorStateMachine const& config,
MemoryManager& memoryManager,
sc_core::sc_time interfaceClk,
uint64_t memorySize,
unsigned int defaultDataLength,
MemoryManager& memoryManager,
std::function<void()> transactionFinished,
std::function<void()> terminateInitiator) :
stateTransistions(config.transitions),
@@ -46,7 +50,7 @@ TrafficGenerator::TrafficGenerator(DRAMSys::Config::TrafficGeneratorStateMachine
issuer(
config.name.c_str(),
memoryManager,
config.clkMhz,
interfaceClk,
config.maxPendingReadRequests,
config.maxPendingWriteRequests,
[this] { return nextRequest(); },
@@ -107,16 +111,17 @@ TrafficGenerator::TrafficGenerator(DRAMSys::Config::TrafficGeneratorStateMachine
}
TrafficGenerator::TrafficGenerator(DRAMSys::Config::TrafficGenerator const& config,
MemoryManager& memoryManager,
sc_core::sc_time interfaceClk,
uint64_t memorySize,
unsigned int defaultDataLength,
MemoryManager& memoryManager,
std::function<void()> transactionFinished,
std::function<void()> terminateInitiator) :
generatorPeriod(sc_core::sc_time(1.0 / static_cast<double>(config.clkMhz), sc_core::SC_US)),
issuer(
config.name.c_str(),
memoryManager,
config.clkMhz,
interfaceClk,
config.maxPendingReadRequests,
config.maxPendingWriteRequests,
[this] { return nextRequest(); },

View File

@@ -35,28 +35,31 @@
#pragma once
#include "RandomProducer.h"
#include "SequentialProducer.h"
#include "simulator/Initiator.h"
#include "simulator/MemoryManager.h"
#include "simulator/request/RequestIssuer.h"
#include <DRAMSys/config/DRAMSysConfiguration.h>
#include <random>
class RequestProducer;
class TrafficGenerator : public Initiator
{
public:
TrafficGenerator(DRAMSys::Config::TrafficGenerator const& config,
MemoryManager& memoryManager,
sc_core::sc_time interfaceClk,
uint64_t memorySize,
unsigned int defaultDataLength,
MemoryManager& memoryManager,
std::function<void()> transactionFinished,
std::function<void()> terminateInitiator);
TrafficGenerator(DRAMSys::Config::TrafficGeneratorStateMachine const& config,
MemoryManager& memoryManager,
sc_core::sc_time interfaceClk,
uint64_t memorySize,
unsigned int defaultDataLength,
MemoryManager& memoryManager,
std::function<void()> transactionFinished,
std::function<void()> terminateInitiator);

View File

@@ -37,7 +37,7 @@
RequestIssuer::RequestIssuer(sc_core::sc_module_name const& name,
MemoryManager& memoryManager,
unsigned int clkMhz,
sc_core::sc_time interfaceClk,
std::optional<unsigned int> maxPendingReadRequests,
std::optional<unsigned int> maxPendingWriteRequests,
std::function<Request()> nextRequest,
@@ -46,7 +46,7 @@ RequestIssuer::RequestIssuer(sc_core::sc_module_name const& name,
sc_module(name),
payloadEventQueue(this, &RequestIssuer::peqCallback),
memoryManager(memoryManager),
clkPeriod(sc_core::sc_time(1.0 / static_cast<double>(clkMhz), sc_core::SC_US)),
interfaceClk(interfaceClk),
maxPendingReadRequests(maxPendingReadRequests),
maxPendingWriteRequests(maxPendingWriteRequests),
transactionFinished(std::move(transactionFinished)),
@@ -85,13 +85,6 @@ void RequestIssuer::sendNextRequest()
sc_core::sc_time sendingTime = sc_core::sc_time_stamp() + delay;
bool needsOffset = (sendingTime % clkPeriod) != sc_core::SC_ZERO_TIME;
if (needsOffset)
{
sendingTime += clkPeriod;
sendingTime -= sendingTime % clkPeriod;
}
delay = sendingTime - sc_core::sc_time_stamp();
iSocket->nb_transport_fw(payload, phase, delay);
@@ -131,7 +124,7 @@ void RequestIssuer::peqCallback(tlm::tlm_generic_payload& payload, const tlm::tl
else if (phase == tlm::BEGIN_RESP)
{
tlm::tlm_phase nextPhase = tlm::END_RESP;
sc_core::sc_time delay = clkPeriod;
sc_core::sc_time delay = interfaceClk;
iSocket->nb_transport_fw(payload, nextPhase, delay);
payload.release();

View File

@@ -52,7 +52,7 @@ public:
RequestIssuer(sc_core::sc_module_name const& name,
MemoryManager& memoryManager,
unsigned int clkMhz,
sc_core::sc_time interfaceClk,
std::optional<unsigned int> maxPendingReadRequests,
std::optional<unsigned int> maxPendingWriteRequests,
std::function<Request()> nextRequest,
@@ -64,7 +64,7 @@ private:
tlm_utils::peq_with_cb_and_phase<RequestIssuer> payloadEventQueue;
MemoryManager& memoryManager;
const sc_core::sc_time clkPeriod;
sc_core::sc_time interfaceClk;
bool transactionPostponed = false;
bool finished = false;
@@ -75,8 +75,8 @@ private:
unsigned int pendingReadRequests = 0;
unsigned int pendingWriteRequests = 0;
const std::optional<unsigned int> maxPendingReadRequests;
const std::optional<unsigned int> maxPendingWriteRequests;
std::optional<unsigned int> maxPendingReadRequests;
std::optional<unsigned int> maxPendingWriteRequests;
std::function<void()> transactionFinished;
std::function<void()> terminate;