Commit Graph

230 Commits

Author SHA1 Message Date
5391b4351d Fix configuration tests 2024-02-23 11:54:51 +01:00
454cb00ddb Refactor: remove monolithic configuration class 2024-02-23 11:54:51 +01:00
d92ea325c3 Remove ControllerIF.h
It provided no advantage and made things unecessary complicated
2024-02-23 11:49:08 +01:00
Lukas Steiner
5eabecc9f9 Merge branch 'odr_fix' into 'develop'
Fix ODR violation of Dram and DramRecordable

See merge request ems/astdm/modeling.dram/dram.sys.5!64
2024-02-23 09:05:50 +00:00
Lukas Steiner
c7a4e31f2f Merge branch 'work/addressdecoder' into 'develop'
Add support for arbitrary XOR address manipulation

See merge request ems/astdm/modeling.dram/dram.sys.5!60
2024-02-23 08:33:59 +00:00
60d3e7618b Fix ODR violation of Dram and DramRecordable
The compiler flag DRAMPower was not propagated to downstream projects,
leading to an ODR violation of the classes Dram and DramRecordable
2024-02-08 11:47:34 +01:00
7b743db820 Add simple benchmark of full DDR3 simulation 2023-12-14 10:04:45 +01:00
1ba63bd1f7 Add support for more than two XOR bits 2023-12-13 10:32:03 +01:00
a89f4a3065 Introduce benchmark support using Google Benchmark 2023-12-11 11:33:11 +01:00
ed2a675145 Extract plausability check from AddressDecoder to separate function 2023-12-11 10:32:39 +01:00
6e0110190e Introduce executeRead() and executeWrite() functions 2023-11-20 16:22:02 +01:00
Lukas Steiner
0b88161640 Merge branch 'DramCleanup' into 'develop'
Introduce method to convert memspecs to DRAMPower memspecs and cleanup source files

See merge request ems/astdm/modeling.dram/dram.sys.5!58
2023-11-16 13:25:16 +00:00
6645a9ed54 Introduce method to convert memspecs to DRAMPower memspecs and cleanup source files 2023-11-14 14:57:25 +01:00
74a9155993 Add RequestBufferSizeRead and RequestBufferSizeWrite configurations for ReadWrite Buffer 2023-11-14 11:00:28 +01:00
d2e5bd36de Fix all warnings 2023-09-22 10:45:23 +02:00
Lukas Steiner
8224e97abe Reformat all files. 2023-09-21 16:50:59 +02:00
Lukas Steiner
68d82cd209 Merge branch 'work/serde' into 'develop'
Introduce Serialize/Deserialize interfaces

See merge request ems/astdm/modeling.dram/dram.sys.5!44
2023-09-19 12:44:45 +00:00
Lukas Steiner
9e53a38132 Fix address mapping for single device without byte bits. 2023-08-31 13:43:49 +02:00
a5810e48f4 Fix recording of memspec and mcconfig in trace database 2023-08-31 11:25:26 +02:00
41343c787e Introduce a concept to report idling to the outside 2023-08-31 10:19:04 +02:00
f96bdd4ac1 Introduce a serialize/deserialize interface 2023-08-31 10:19:01 +02:00
692ac5e566 Fix StlPlayer to store real data 2023-08-31 09:34:35 +02:00
c07d09f392 Format all files 2023-08-29 09:26:25 +02:00
1bb3c3ea0f Use raw string literal for database creation 2023-08-29 09:22:45 +02:00
Lukas Steiner
ccb4ee592b Remove masked write from GDDR checkers. 2023-08-23 15:30:15 +02:00
Lukas Steiner
12f2b73cde Additional check of byte enable pointer. 2023-08-23 15:21:53 +02:00
Lukas Steiner
0f824e8b92 Do not allow masked write in default case. 2023-08-23 11:41:58 +02:00
a539e3c011 Merge branch 'develop' into work/partial_writes 2023-08-23 09:31:42 +02:00
0d67a1fc2b Support byte_enable_ptr for debug transport 2023-08-22 11:26:28 +02:00
47bdddc5f1 Different tCCDMW timing when previous WR had BL32 in LPDDR4 2023-08-22 09:41:36 +02:00
4548d20b6e Rename requiresMaskedWrite to requiresReadModifyWrite 2023-08-21 10:55:41 +02:00
f1cfb80337 Minor readability fixes 2023-08-21 10:10:49 +02:00
a0f93a75e2 Merge develop 2023-08-21 10:01:08 +02:00
b30df49d67 Use tCCDMW for masked write in LPDDR4 2023-08-21 09:26:05 +02:00
3f0372f1f7 Add Partial Write support for blocking accesses 2023-08-16 09:45:32 +02:00
570fb985df Fix MWR and MWRA command lengths for LPDDR4 2023-08-16 09:38:57 +02:00
c5f1320399 Implement Partial Write for DDR5 2023-08-16 09:38:57 +02:00
40dbc518b6 Add hack in TimingCheckers to convert MWR to WR in insertion stage 2023-08-16 09:38:54 +02:00
f7066a22b0 First implementation of Partial Writes 2023-08-16 09:38:54 +02:00
Lukas Steiner
a8d15e35a5 Merge branch 'work/regression_tests' into 'develop'
Add a regression test for every standard

See merge request ems/astdm/modeling.dram/dram.sys.5!34
2023-08-15 12:00:48 +00:00
Lukas Steiner
5598d53ebd Merge branch 'cmake_debug' into 'develop'
Disable CMake diagnostics print

See merge request ems/astdm/modeling.dram/dram.sys.5!40
2023-08-15 09:28:28 +00:00
81eaccf3d6 Add lastCommandOn{C,R}asBus != scMaxTime check for HBM2 and HBM3 2023-08-15 10:58:10 +02:00
e3bd773cac Implement isFullCycle, alignAtNext functions in utils and add tests 2023-08-15 10:58:10 +02:00
Lukas Steiner
56c9f5f5f0 Merge branch 'initialize_generalinfotable' into 'develop'
Write GeneralInfo table at the beginning

See merge request ems/astdm/modeling.dram/dram.sys.5!39
2023-08-14 13:33:40 +00:00
Lukas Steiner
962cc5cf30 Merge branch 'bugfix_includes' into 'develop'
Fix includes that cause build errors on some platforms

See merge request ems/astdm/modeling.dram/dram.sys.5!38
2023-08-14 11:36:57 +00:00
Lukas Steiner
766e12fff1 Merge branch 'bugfix/initiator' into 'develop'
Fix a timing issue in the traffic initiator

See merge request ems/astdm/modeling.dram/dram.sys.5!37
2023-08-14 09:14:50 +00:00
Lukas Steiner
b5fb23b55d Merge branch 'debug_file' into 'develop'
Don't create log file when debug is not enabled

See merge request ems/astdm/modeling.dram/dram.sys.5!36
2023-08-10 12:27:54 +00:00
Lukas Steiner
cb9689a08d Merge branch 'work/simulator_library' into 'develop'
Introduce Simulator class

See merge request ems/astdm/modeling.dram/dram.sys.5!35
2023-08-10 12:19:33 +00:00
a6e1f83570 Remove unnecessary includes from Cache 2023-08-09 16:00:43 +02:00
ccc1bc73c4 Disable CMake diagnostics print 2023-08-09 14:57:29 +02:00