Lukas Steiner
|
335704af61
|
Merge branch 'develop' into DDR5
# Conflicts:
# DRAMSys/traceAnalyzer/presentation/transactiontreewidget.cpp
|
2020-09-10 11:41:37 +02:00 |
|
Lukas Steiner
|
c919c23ddd
|
Update readme (new website, DDR5/LPDDR5).
|
2020-09-09 14:54:34 +02:00 |
|
Lukas Steiner
|
ae4ab58ec8
|
Merge branch 'stlplayer_speedup' into 'develop'
Parse larger chunks of the input file to create less system calls.
See merge request ems/astdm/dram.sys!266
|
2020-09-09 14:39:11 +02:00 |
|
Lukas Steiner
|
3725eb0c8c
|
Parse larger chunks of the input file to create less system calls.
|
2020-09-09 14:26:27 +02:00 |
|
Lukas Steiner
|
90ccdece6a
|
Add 2N mode for commands.
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2020-09-03 16:13:15 +02:00 |
|
Lukas Steiner
|
57d4266a30
|
First working version of same bank refresh implemented.
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2020-08-31 17:02:38 +02:00 |
|
Lukas Steiner
|
ef90bfbb91
|
First part of same bank refresh (manager not done).
|
2020-08-28 16:17:47 +02:00 |
|
Lukas Steiner
|
e9d206441e
|
Fix indication error for RDA/WRA commands.
|
2020-08-28 10:05:39 +02:00 |
|
Lukas Steiner
|
57f6881ae1
|
Add new commands and command lengths.
|
2020-08-27 15:33:17 +02:00 |
|
Lukas Steiner
|
8ba0180d57
|
Groupwise commands can be displayed.
|
2020-08-27 14:31:18 +02:00 |
|
Lukas Steiner
|
d9fc7ac496
|
Add PRESB and REFSB commands.
|
2020-08-26 16:27:21 +02:00 |
|
Lukas Steiner
|
7b5cbe03e0
|
Change indices in transaction tree widget to relative numbers.
|
2020-08-26 16:16:16 +02:00 |
|
Lukas Steiner
|
aa7ae09e2b
|
Add rank and bankgroup to drawing.
|
2020-08-26 11:36:15 +02:00 |
|
Lukas Steiner
|
79cb57a672
|
Add number of bankgroups and REFSB command length to trace analyzer.
|
2020-08-26 10:20:45 +02:00 |
|
Lukas Steiner
|
eb720d5aa6
|
Add DDR5 example.
|
2020-08-25 10:18:10 +02:00 |
|
Lukas Steiner
|
2c15bb8f79
|
Add new DDR5 checker and timings.
|
2020-08-25 10:16:45 +02:00 |
|
Lukas Steiner
|
c15434c4fa
|
Add initial version of DDR5 based on DDR4.
|
2020-08-19 09:46:24 +02:00 |
|
Lukas Steiner
|
d2a90773eb
|
Add read and write preambles to DDR4.
|
2020-08-18 10:12:19 +02:00 |
|
Lukas Steiner
|
911a6cfe7b
|
Add initial memspec for DDR5.
|
2020-08-14 13:59:46 +02:00 |
|
Lukas Steiner
|
cdff68dda2
|
Fix typo in transaction tree widget.
|
2020-08-14 13:27:00 +02:00 |
|
Lukas Steiner
|
15517bf53f
|
Correct bandwidth calculation, move Trace Analyzer to top of readme.
|
2020-08-10 11:10:47 +02:00 |
|
Lukas Steiner
|
7e2d0b1c3c
|
Fix bug that was introduced with merge.
|
2020-08-06 14:11:58 +02:00 |
|
Lukas Steiner
|
3dfb3ef562
|
Merge branch 'develop' of https://git.eit.uni-kl.de/ems/astdm/dram.sys into develop
|
2020-08-05 16:56:21 +02:00 |
|
Lukas Steiner
|
fe0d60bbc8
|
Change name in logo to DRAMSys4.0.
|
2020-08-05 16:55:38 +02:00 |
|
Lukas Steiner
|
43f9f0b6c0
|
Merge branch 'refb_multicycle_fix' into 'develop'
Fix for REFB with multicycle commands.
See merge request ems/astdm/dram.sys!264
|
2020-08-05 16:51:39 +02:00 |
|
Lukas Steiner
|
772f6c8eed
|
Prioritize command of PDM for staggered entry.
|
2020-08-05 15:12:27 +02:00 |
|
Matthias Jung
|
00836f432d
|
Added DRAMSys Logo
|
2020-08-05 10:59:38 +02:00 |
|
Lukas Steiner
|
25a268fc8c
|
Move to old bankwise refresh manager.
|
2020-07-31 09:16:09 +02:00 |
|
Lukas Steiner
|
764135eb00
|
Revert changes in timing checkers.
|
2020-07-30 15:58:13 +02:00 |
|
Lukas Steiner
|
d8f8f83a88
|
Update HBM to new command view.
|
2020-07-30 15:01:00 +02:00 |
|
Lukas Steiner
|
f68bef7e74
|
Add earliest time of issuance to command tuple and adapt cmd muxes.
|
2020-07-30 14:33:34 +02:00 |
|
Lukas Steiner
|
f23ea816c3
|
std::pair to std::tuple for new command multiplexer.
|
2020-07-29 14:58:26 +02:00 |
|
Lukas Steiner
|
4ce4611b9c
|
Multi-cycle commands scheduled at last cycle on bus, LPDDR4 adapted.
|
2020-07-29 09:05:32 +02:00 |
|
Lukas Steiner
|
12a4163afc
|
Merge branch 'test_improvement' into 'develop'
Updates to readme for GitHub.
See merge request ems/astdm/dram.sys!262
|
2020-07-22 10:06:23 +02:00 |
|
Lukas Steiner
|
4379390473
|
Update readme, change examples to FR-FCFS scheduler.
|
2020-07-22 09:54:06 +02:00 |
|
Lukas Steiner
|
de47f25f4f
|
Update trace analyzer readme section.
|
2020-07-21 10:20:03 +02:00 |
|
Lukas Steiner
|
6a64e2eac6
|
Move disclaimer to the top, remove voco traces.
|
2020-07-21 09:48:20 +02:00 |
|
Lukas Steiner
|
2f34b4d8dc
|
Add logo and UML to the readme.
|
2020-07-20 15:15:04 +02:00 |
|
Lukas Steiner
|
cf3398c66f
|
Create working example for thermalsim.
|
2020-07-20 13:46:25 +02:00 |
|
Lukas Steiner
|
9e403d5887
|
Merge branch 'test_improvement' into 'develop'
Update readme, add RDA/WRA to refresh manager, use UINT64_C literals
See merge request ems/astdm/dram.sys!260
|
2020-07-09 09:44:20 +02:00 |
|
Lukas Steiner
|
9fe7232d7f
|
Include elastic trace example, extend readme.
|
2020-07-09 09:30:58 +02:00 |
|
Lukas Steiner
|
156bbb7442
|
Use UINT64_C literals in address decoder.
|
2020-07-08 13:58:47 +02:00 |
|
Lukas Steiner
|
9a3dc16d56
|
Add RDA and WRA to RefreshManagerRankwise.
|
2020-07-08 09:08:32 +02:00 |
|
Lukas Steiner
|
241352be20
|
Add nlohmann json submodule.
|
2020-07-06 18:05:43 +02:00 |
|
Lukas Steiner
|
bacf0017ba
|
Resolve merge conflicts.
|
2020-07-06 17:57:04 +02:00 |
|
Lukas Steiner
|
0e0b80d646
|
Merge branch 'development'
# Conflicts:
# .gitlab-ci.yml
# DRAMSys/CMakeLists.txt
# DRAMSys/gem5/CMakeLists.txt
# DRAMSys/library/CMakeLists.txt
# DRAMSys/library/resources/configs/mcconfigs/fifo.json
# DRAMSys/library/resources/configs/mcconfigs/fifoStrict.json
# DRAMSys/library/resources/configs/mcconfigs/fr_fcfs.json
# DRAMSys/library/resources/configs/mcconfigs/fr_fcfs_grp.json
# DRAMSys/library/resources/configs/memspecs/HBM2.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_256Mb_WIDEIO-200_128bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_256Mb_WIDEIO-266_128bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4Gb_DDR4-1866_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4Gb_DDR4-2400_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4x64_2Gb_WIDEIO2-400_64bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_4x64_2Gb_WIDEIO2-533_64bit.json
# DRAMSys/library/resources/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-1066_16bit_H.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR2-800_16bit_H.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_16bit_G_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1066_8bit_G_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_less_refresh.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-1600_8bit_G_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_1Gb_DDR3-800_8bit_G.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_G_UDIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1333_64bit_D_SODIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2GB_DDR3-1600_64bit_G_UDIMM.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1066_8bit_D_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_2s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_3s.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_DDR3-1600_16bit_D_mu.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR-266_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR-333_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR2-1066-S4_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_2Gb_LPDDR2-800-S4_16bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_DDR4-2400_8bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_LPDDR3-1333_32bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_4Gb_LPDDR3-1600_32bit_A.json
# DRAMSys/library/resources/configs/memspecs/MICRON_6Gb_LPDDR4-3200_32bit_A.json
# DRAMSys/library/resources/configs/memspecs/SAMSUNG_K4B1G1646E_1Gb_DDR3-1600_16bit.json
# DRAMSys/library/resources/configs/memspecs/SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit.json
# DRAMSys/library/resources/configs/memspecs/memspec_ranktest.json
# DRAMSys/library/resources/configs/simulator/ddr3.json
# DRAMSys/library/resources/configs/simulator/ddr3_ecc.json
# DRAMSys/library/resources/configs/simulator/ddr3_gem5_se.json
# DRAMSys/library/resources/configs/simulator/ddr4.json
# DRAMSys/library/resources/configs/simulator/hbm2.json
# DRAMSys/library/resources/configs/simulator/lpddr4.json
# DRAMSys/library/resources/configs/simulator/wideio.json
# DRAMSys/library/resources/configs/simulator/wideio_ecc.json
# DRAMSys/library/resources/configs/simulator/wideio_thermal.json
# DRAMSys/library/src/common/TlmRecorder.cpp
# DRAMSys/library/src/common/utils.cpp
# DRAMSys/library/src/common/utils.h
# DRAMSys/library/src/configuration/Configuration.cpp
# DRAMSys/library/src/configuration/memspec/MemSpec.cpp
# DRAMSys/library/src/configuration/memspec/MemSpec.h
# DRAMSys/library/src/configuration/memspec/MemSpecDDR3.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecDDR4.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecGDDR5.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecGDDR5X.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecGDDR6.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecHBM2.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecLPDDR4.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecWideIO.cpp
# DRAMSys/library/src/configuration/memspec/MemSpecWideIO2.cpp
# DRAMSys/library/src/controller/Controller.cpp
# DRAMSys/library/src/controller/ControllerRecordable.cpp
# DRAMSys/library/src/controller/checker/CheckerLPDDR4.cpp
# DRAMSys/library/src/simulation/Arbiter.cpp
# DRAMSys/library/src/simulation/DRAMSys.cpp
# DRAMSys/library/src/simulation/DRAMSysRecordable.cpp
# DRAMSys/library/src/simulation/Setup.h
# DRAMSys/library/src/simulation/dram/DramRecordable.cpp
# DRAMSys/pct/createPlatform.tcl
# DRAMSys/simulator/CMakeLists.txt
# DRAMSys/tests/DDR3/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml
# DRAMSys/tests/DDR3/configs/mcconfigs/fifoStrict.xml
# DRAMSys/tests/DDR3/configs/mcconfigs/fr_fcfs.xml
# DRAMSys/tests/DDR4/configs/simulator/ddr4.json
# DRAMSys/tests/ddr3_multirank/configs/simulator/ddr3.json
# DRAMSys/tests/lpddr4/configs/amconfigs/am_lpddr4_8Gbx16_brc.json
# README.md
|
2020-07-06 17:39:23 +02:00 |
|
Lukas Steiner
|
33a9d97217
|
Merge branch 'readme_github' into 'development'
Readme for GitHub
See merge request ems/astdm/dram.sys!258
|
2020-07-06 17:00:30 +02:00 |
|
Lukas Steiner
|
a68aa08e3a
|
Remove unused example and trace files.
|
2020-07-06 16:52:05 +02:00 |
|
Lukas Steiner
|
619cff337a
|
Renaming of directory.
|
2020-07-06 14:37:05 +02:00 |
|
Lukas Steiner
|
82c32728fa
|
Renaming of gem5 config files.
|
2020-07-06 14:25:44 +02:00 |
|