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Remove unused example and trace files.

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This commit is contained in:
Lukas Steiner
2020-07-06 16:52:05 +02:00
parent 619cff337a
commit a68aa08e3a
11 changed files with 6 additions and 151 deletions
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17
DRAMSys/library/CMakeLists.txt
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@@ -173,13 +173,9 @@ add_library(DRAMSysLibrary
# Simulation Config Files
resources/simulations/ddr3-boot-linux.json
resources/simulations/ddr3-ecc.json
resources/simulations/ddr3-example2.json
resources/simulations/ddr3-example.json
resources/simulations/ddr3-example2.json
resources/simulations/ddr3-gem5-se.json
resources/simulations/ddr3_postpone_ref_test.json
resources/simulations/ddr3-single-device.json
resources/simulations/ddr4-example.json
resources/simulations/hbm2-example.json
resources/simulations/lpddr4-example.json
@@ -188,7 +184,6 @@ add_library(DRAMSysLibrary
resources/simulations/wideio-thermal.json
# Address Mapping Config Files
resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.json
resources/configs/amconfigs/am_ddr3_4x4Gbx16_dimm_p2KB_brc.json
resources/configs/amconfigs/am_ddr3_4x4Gbx16_dimm_p2KB_rbc.json
resources/configs/amconfigs/am_ddr3_8x1Gbx8_dimm_p1KB_brc.json
@@ -271,11 +266,9 @@ add_library(DRAMSysLibrary
resources/configs/memspecs/SAMSUNG_K4B4G1646Q_4Gb_DDR3-1066_16bit.json
# Simulator Config Files
resources/configs/simulator/ddr3_boot_linux.json
resources/configs/simulator/ddr3_ecc.json
resources/configs/simulator/ddr3.json
resources/configs/simulator/ddr3_gem5_se.json
resources/configs/simulator/ddr3-single-device.json
resources/configs/simulator/ddr4.json
resources/configs/simulator/hbm2.json
resources/configs/simulator/lpddr4.json
@@ -285,14 +278,6 @@ add_library(DRAMSysLibrary
# Thermal Simulation Config Files
resources/configs/thermalsim/config.json
resources/configs/thermalsim/powerInfo.json
# Trace Files
resources/traces/test_ecc.stl
resources/traces/ddr3_example.stl
resources/traces/ddr3_single_dev_example.stl
resources/traces/ddr3_postpone_ref_test_1.stl
resources/traces/ranktest.stl
resources/traces/chstone-adpcm_32.stl
)
if(DEFINED ENV{LIBTHREED_ICE_HOME})

37
DRAMSys/library/resources/configs/amconfigs/am_ddr3_1Gbx8_p1KB_brc.json
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@@ -1,37 +0,0 @@
{
"CONGEN": {
"BANK_BIT": [
24,
25,
26
],
"COLUMN_BIT": [
0,
1,
2,
3,
4,
5,
6,
7,
8,
9
],
"ROW_BIT": [
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23
]
}
}

5
DRAMSys/library/resources/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json
View File

@@ -72,15 +72,17 @@
"ESCKE": 3,
"FAW": 64,
"PPD": 4,
"RAS": 68,
"RCD": 29,
"REFI": 6246,
"REFIPB": 780,
"RFCAB": 448,
"RFCPB": 224,
"RL": 28,
"RAS": 68,
"RPAB": 34,
"RPPB": 29,
"RCAB": 102,
"RCPB": 97,
"RPST": 0,
"RRD": 16,
"RTP": 12,
@@ -91,6 +93,7 @@
"WTR": 16,
"XP": 12,
"XSR": 460,
"RTRS": 1,
"clkMhz": 1600
}
}

1
DRAMSys/library/resources/configs/memspecs/memspec_ranktest.json
View File

@@ -8,6 +8,7 @@
"nbrOfRanks": 4,
"nbrOfRows": 16384,
"width": 8,
"nbrOfDevicesOnDIMM": 8,
"nbrOfChannels": 1
},
"memoryId": "MICRON_1Gb_DDR3-1600_8bit_G",

19
DRAMSys/library/resources/configs/simulator/ddr3-single-device.json
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@@ -1,19 +0,0 @@
{
"simconfig": {
"AddressOffset": 0,
"CheckTLM2Protocol": false,
"DatabaseRecording": true,
"Debug": false,
"ECCControllerMode": "Disabled",
"EnableWindowing": true,
"ErrorCSVFile": "",
"ErrorChipSeed": 42,
"PowerAnalysis": true,
"SimulationName": "ddr3_single_dev",
"SimulationProgressBar": true,
"StoreMode": "NoStorage",
"ThermalSimulation": false,
"UseMalloc": false,
"WindowSize": 1000
}
}

19
DRAMSys/library/resources/configs/simulator/ddr3_boot_linux.json
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@@ -1,19 +0,0 @@
{
"simconfig": {
"AddressOffset": 2147483648,
"CheckTLM2Protocol": false,
"DatabaseRecording": true,
"Debug": false,
"ECCControllerMode": "Disabled",
"EnableWindowing": true,
"ErrorCSVFile": "",
"ErrorChipSeed": 42,
"PowerAnalysis": true,
"SimulationName": "ddr3",
"SimulationProgressBar": true,
"StoreMode": "Store",
"ThermalSimulation": false,
"UseMalloc": true,
"WindowSize": 1000
}
}

1
DRAMSys/library/resources/configs/simulator/lpddr4.json
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@@ -8,7 +8,6 @@
"EnableWindowing": false,
"ErrorCSVFile": "",
"ErrorChipSeed": 42,
"NumberOfMemChannels": 1,
"PowerAnalysis": false,
"SimulationName": "lpddr4",
"SimulationProgressBar": true,

10
DRAMSys/library/resources/simulations/ddr3-boot-linux.json
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@@ -1,10 +0,0 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_rbc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3_boot_linux.json",
"simulationid": "ddr3-boot-linux",
"thermalconfig": "config.json"
}
}

16
DRAMSys/library/resources/simulations/ddr3-ecc.json
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@@ -1,16 +0,0 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifo.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G_less_refresh.json",
"simconfig": "ddr3_ecc.json",
"simulationid": "ddr3-ecc",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,
"name": "test_ecc.stl"
}
]
}
}

16
DRAMSys/library/resources/simulations/ddr3-single-device.json
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@@ -1,16 +0,0 @@
{
"simulation": {
"addressmapping": "am_ddr3_1Gbx8_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3-single-device.json",
"simulationid": "ddr3-single-device",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 200,
"name": "ddr3_single_dev_example.stl"
}
]
}
}

16
DRAMSys/library/resources/simulations/ddr3_postpone_ref_test.json
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@@ -1,16 +0,0 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3.json",
"simulationid": "ddr3_postpone_ref_test",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,
"name": "ddr3_postpone_ref_test_1.stl"
}
]
}
}