Add initial memspec for DDR5.
This commit is contained in:
Lukas Steiner
142
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp
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142
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp
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/*
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* Copyright (c) 2020, Technische Universität Kaiserslautern
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors:
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* Lukas Steiner
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*/
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#include "MemSpecDDR5.h"
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#include "../Configuration.h"
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using namespace tlm;
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using json = nlohmann::json;
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MemSpecDDR5::MemSpecDDR5(json &memspec)
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: MemSpec(memspec,
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parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"),
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parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBankGroups"], "nbrOfBankGroups"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks")
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/ parseUint(memspec["memarchitecturespec"]["nbrOfBankGroups"], "nbrOfBankGroups"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks")
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* parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfBankGroups"], "nbrOfBankGroups")
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* parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"),
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parseUint(memspec["memarchitecturespec"]["nbrOfDevicesOnDIMM"],"nbrOfDevicesOnDIMM")),
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tCKE (tCK * parseUint(memspec["memtimingspec"]["CKE"], "CKE")),
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tPD (tCKE),
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tCKESR (tCK * parseUint(memspec["memtimingspec"]["CKESR"], "CKESR")),
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tDQSCK (tCK * parseUint(memspec["memtimingspec"]["DQSCK"], "DQSCK")),
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tRAS (tCK * parseUint(memspec["memtimingspec"]["RAS"], "RAS")),
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tRC (tCK * parseUint(memspec["memtimingspec"]["RC"], "RC")),
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tRCD (tCK * parseUint(memspec["memtimingspec"]["RCD"], "RCD")),
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tRL (tCK * parseUint(memspec["memtimingspec"]["RL"], "RL")),
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tRTP (tCK * parseUint(memspec["memtimingspec"]["RTP"], "RTP")),
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tWL (tCK * parseUint(memspec["memtimingspec"]["WL"], "WL")),
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tWR (tCK * parseUint(memspec["memtimingspec"]["WR"], "WR")),
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tXP (tCK * parseUint(memspec["memtimingspec"]["XP"], "XP")),
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tXS (tCK * parseUint(memspec["memtimingspec"]["XS"], "XS")),
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tCCD_S (tCK * parseUint(memspec["memtimingspec"]["CCD_S"], "CCD_S")),
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tCCD_L (tCK * parseUint(memspec["memtimingspec"]["CCD_L"], "CCD_L")),
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tFAW (tCK * parseUint(memspec["memtimingspec"]["FAW"], "FAW")),
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tREFI ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 4) ?
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(tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 4)) :
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((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 2) ?
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(tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 2)) :
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(tCK * parseUint(memspec["memtimingspec"]["REFI"], "REFI")))),
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tRFC ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 4) ?
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(tCK * parseUint(memspec["memtimingspec"]["RFC4"], "RFC4")) :
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((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 2) ?
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(tCK * parseUint(memspec["memtimingspec"]["RFC2"], "RFC2")) :
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(tCK * parseUint(memspec["memtimingspec"]["RFC"], "RFC")))),
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tRP (tCK * parseUint(memspec["memtimingspec"]["RP"], "RP")),
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tRRD_S (tCK * parseUint(memspec["memtimingspec"]["RRD_S"], "RRD_S")),
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tRRD_L (tCK * parseUint(memspec["memtimingspec"]["RRD_L"], "RRD_L")),
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tWTR_S (tCK * parseUint(memspec["memtimingspec"]["WTR_S"], "WTR_S")),
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tWTR_L (tCK * parseUint(memspec["memtimingspec"]["WTR_L"], "WTR_L")),
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tAL (tCK * parseUint(memspec["memtimingspec"]["AL"], "AL")),
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tXPDLL (tCK * parseUint(memspec["memtimingspec"]["XPDLL"], "XPDLL")),
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tXSDLL (tCK * parseUint(memspec["memtimingspec"]["XSDLL"], "XSDLL")),
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tACTPDEN (tCK * parseUint(memspec["memtimingspec"]["ACTPDEN"], "ACTPDEN")),
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tPRPDEN (tCK * parseUint(memspec["memtimingspec"]["PRPDEN"], "PRPDEN")),
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tREFPDEN (tCK * parseUint(memspec["memtimingspec"]["REFPDEN"], "REFPDEN")),
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tRTRS (tCK * parseUint(memspec["memtimingspec"]["RTRS"], "RTRS"))
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{}
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sc_time MemSpecDDR5::getRefreshIntervalAB() const
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{
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return tREFI;
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}
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sc_time MemSpecDDR5::getRefreshIntervalPB() const
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{
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SC_REPORT_FATAL("MemSpecDDR5", "Per bank refresh not supported");
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return SC_ZERO_TIME;
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}
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// Returns the execution time for commands that have a fixed execution time
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sc_time MemSpecDDR5::getExecutionTime(Command command, const tlm_generic_payload &) const
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{
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if (command == Command::PRE || command == Command::PREA)
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return tRP;
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else if (command == Command::ACT)
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return tRCD;
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else if (command == Command::RD)
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return tRL + burstDuration;
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else if (command == Command::RDA)
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return tRTP + tRP;
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else if (command == Command::WR)
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return tWL + burstDuration;
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else if (command == Command::WRA)
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return tWL + burstDuration + tWR + tRP;
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else if (command == Command::REFA)
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return tRFC;
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else
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{
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SC_REPORT_FATAL("getExecutionTime",
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"command not known or command doesn't have a fixed execution time");
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return SC_ZERO_TIME;
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}
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}
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TimeInterval MemSpecDDR5::getIntervalOnDataStrobe(Command command) const
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{
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if (command == Command::RD || command == Command::RDA)
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return TimeInterval(sc_time_stamp() + tRL, sc_time_stamp() + tRL + burstDuration);
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else if (command == Command::WR || command == Command::WRA)
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return TimeInterval(sc_time_stamp() + tWL, sc_time_stamp() + tWL + burstDuration);
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else
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{
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SC_REPORT_FATAL("MemSpec", "Method was called with invalid argument");
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return TimeInterval();
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}
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}
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89
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h
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89
DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h
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@@ -0,0 +1,89 @@
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/*
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* Copyright (c) 2020, Technische Universität Kaiserslautern
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
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||||
* OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
|
||||
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
|
||||
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors:
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* Lukas Steiner
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*/
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#ifndef MEMSPECDDR5_H
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#define MEMSPECDDR5_H
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#include "MemSpec.h"
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#include "../../common/third_party/nlohmann/single_include/nlohmann/json.hpp"
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class MemSpecDDR5 final : public MemSpec
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{
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public:
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MemSpecDDR5(nlohmann::json &memspec);
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// Memspec Variables:
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const sc_time tRCD;
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const sc_time tPPD;
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const sc_time tRP;
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const sc_time tRAS;
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const sc_time tRL;
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const sc_time tRTP;
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const sc_time tRPRE;
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const sc_time tRPST;
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const sc_time tRDQSOFF;
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const sc_time tWL;
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const sc_time tWR;
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const sc_time tWTR_L;
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const sc_time tWTR_S;
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const sc_time tWPRE;
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const sc_time tWPST;
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const sc_time tCCD_L_slr;
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const sc_time tCCD_S_slr;
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const sc_time tCCD_dlr;
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const sc_time tCCD_L_WR_slr;
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const sc_time tCCD_S_WR_slr;
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const sc_time tCCD_WR_dlr;
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const sc_time tCCD_WR_dpr;
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const sc_time
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const sc_time
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const sc_time
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const sc_time
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const sc_time
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const sc_time
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const sc_time
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const sc_time
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// Currents and Voltages:
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// TODO: to be completed
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virtual sc_time getRefreshIntervalPB() const override;
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virtual sc_time getRefreshIntervalAB() const override;
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virtual sc_time getExecutionTime(Command, const tlm::tlm_generic_payload &) const override;
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virtual TimeInterval getIntervalOnDataStrobe(Command) const override;
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};
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#endif // MEMSPECDDR5_H
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