diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp new file mode 100644 index 00000000..dca14f33 --- /dev/null +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.cpp @@ -0,0 +1,142 @@ +/* + * Copyright (c) 2020, Technische Universität Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: + * Lukas Steiner + */ + +#include "MemSpecDDR5.h" +#include "../Configuration.h" + +using namespace tlm; +using json = nlohmann::json; + +MemSpecDDR5::MemSpecDDR5(json &memspec) + : MemSpec(memspec, + parseUint(memspec["memarchitecturespec"]["nbrOfChannels"],"nbrOfChannels"), + parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), + parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks"), + parseUint(memspec["memarchitecturespec"]["nbrOfBankGroups"], "nbrOfBankGroups"), + parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks") + / parseUint(memspec["memarchitecturespec"]["nbrOfBankGroups"], "nbrOfBankGroups"), + parseUint(memspec["memarchitecturespec"]["nbrOfBanks"],"nbrOfBanks") + * parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), + parseUint(memspec["memarchitecturespec"]["nbrOfBankGroups"], "nbrOfBankGroups") + * parseUint(memspec["memarchitecturespec"]["nbrOfRanks"],"nbrOfRanks"), + parseUint(memspec["memarchitecturespec"]["nbrOfDevicesOnDIMM"],"nbrOfDevicesOnDIMM")), + tCKE (tCK * parseUint(memspec["memtimingspec"]["CKE"], "CKE")), + tPD (tCKE), + tCKESR (tCK * parseUint(memspec["memtimingspec"]["CKESR"], "CKESR")), + tDQSCK (tCK * parseUint(memspec["memtimingspec"]["DQSCK"], "DQSCK")), + tRAS (tCK * parseUint(memspec["memtimingspec"]["RAS"], "RAS")), + tRC (tCK * parseUint(memspec["memtimingspec"]["RC"], "RC")), + tRCD (tCK * parseUint(memspec["memtimingspec"]["RCD"], "RCD")), + tRL (tCK * parseUint(memspec["memtimingspec"]["RL"], "RL")), + tRTP (tCK * parseUint(memspec["memtimingspec"]["RTP"], "RTP")), + tWL (tCK * parseUint(memspec["memtimingspec"]["WL"], "WL")), + tWR (tCK * parseUint(memspec["memtimingspec"]["WR"], "WR")), + tXP (tCK * parseUint(memspec["memtimingspec"]["XP"], "XP")), + tXS (tCK * parseUint(memspec["memtimingspec"]["XS"], "XS")), + tCCD_S (tCK * parseUint(memspec["memtimingspec"]["CCD_S"], "CCD_S")), + tCCD_L (tCK * parseUint(memspec["memtimingspec"]["CCD_L"], "CCD_L")), + tFAW (tCK * parseUint(memspec["memtimingspec"]["FAW"], "FAW")), + tREFI ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 4) ? + (tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 4)) : + ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 2) ? + (tCK * (parseUint(memspec["memtimingspec"]["REFI"], "REFI") / 2)) : + (tCK * parseUint(memspec["memtimingspec"]["REFI"], "REFI")))), + tRFC ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 4) ? + (tCK * parseUint(memspec["memtimingspec"]["RFC4"], "RFC4")) : + ((parseUint(memspec["memtimingspec"]["REFM"], "REFM") == 2) ? + (tCK * parseUint(memspec["memtimingspec"]["RFC2"], "RFC2")) : + (tCK * parseUint(memspec["memtimingspec"]["RFC"], "RFC")))), + tRP (tCK * parseUint(memspec["memtimingspec"]["RP"], "RP")), + tRRD_S (tCK * parseUint(memspec["memtimingspec"]["RRD_S"], "RRD_S")), + tRRD_L (tCK * parseUint(memspec["memtimingspec"]["RRD_L"], "RRD_L")), + tWTR_S (tCK * parseUint(memspec["memtimingspec"]["WTR_S"], "WTR_S")), + tWTR_L (tCK * parseUint(memspec["memtimingspec"]["WTR_L"], "WTR_L")), + tAL (tCK * parseUint(memspec["memtimingspec"]["AL"], "AL")), + tXPDLL (tCK * parseUint(memspec["memtimingspec"]["XPDLL"], "XPDLL")), + tXSDLL (tCK * parseUint(memspec["memtimingspec"]["XSDLL"], "XSDLL")), + tACTPDEN (tCK * parseUint(memspec["memtimingspec"]["ACTPDEN"], "ACTPDEN")), + tPRPDEN (tCK * parseUint(memspec["memtimingspec"]["PRPDEN"], "PRPDEN")), + tREFPDEN (tCK * parseUint(memspec["memtimingspec"]["REFPDEN"], "REFPDEN")), + tRTRS (tCK * parseUint(memspec["memtimingspec"]["RTRS"], "RTRS")) +{} + +sc_time MemSpecDDR5::getRefreshIntervalAB() const +{ + return tREFI; +} + +sc_time MemSpecDDR5::getRefreshIntervalPB() const +{ + SC_REPORT_FATAL("MemSpecDDR5", "Per bank refresh not supported"); + return SC_ZERO_TIME; +} + +// Returns the execution time for commands that have a fixed execution time +sc_time MemSpecDDR5::getExecutionTime(Command command, const tlm_generic_payload &) const +{ + if (command == Command::PRE || command == Command::PREA) + return tRP; + else if (command == Command::ACT) + return tRCD; + else if (command == Command::RD) + return tRL + burstDuration; + else if (command == Command::RDA) + return tRTP + tRP; + else if (command == Command::WR) + return tWL + burstDuration; + else if (command == Command::WRA) + return tWL + burstDuration + tWR + tRP; + else if (command == Command::REFA) + return tRFC; + else + { + SC_REPORT_FATAL("getExecutionTime", + "command not known or command doesn't have a fixed execution time"); + return SC_ZERO_TIME; + } +} + +TimeInterval MemSpecDDR5::getIntervalOnDataStrobe(Command command) const +{ + if (command == Command::RD || command == Command::RDA) + return TimeInterval(sc_time_stamp() + tRL, sc_time_stamp() + tRL + burstDuration); + else if (command == Command::WR || command == Command::WRA) + return TimeInterval(sc_time_stamp() + tWL, sc_time_stamp() + tWL + burstDuration); + else + { + SC_REPORT_FATAL("MemSpec", "Method was called with invalid argument"); + return TimeInterval(); + } +} diff --git a/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h new file mode 100644 index 00000000..cc9dcda8 --- /dev/null +++ b/DRAMSys/library/src/configuration/memspec/MemSpecDDR5.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2020, Technische Universität Kaiserslautern + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER + * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: + * Lukas Steiner + */ + +#ifndef MEMSPECDDR5_H +#define MEMSPECDDR5_H + +#include "MemSpec.h" +#include "../../common/third_party/nlohmann/single_include/nlohmann/json.hpp" + +class MemSpecDDR5 final : public MemSpec +{ +public: + MemSpecDDR5(nlohmann::json &memspec); + + // Memspec Variables: + const sc_time tRCD; + const sc_time tPPD; + const sc_time tRP; + const sc_time tRAS; + const sc_time tRL; + const sc_time tRTP; + const sc_time tRPRE; + const sc_time tRPST; + const sc_time tRDQSOFF; + const sc_time tWL; + const sc_time tWR; + const sc_time tWTR_L; + const sc_time tWTR_S; + const sc_time tWPRE; + const sc_time tWPST; + const sc_time tCCD_L_slr; + const sc_time tCCD_S_slr; + const sc_time tCCD_dlr; + const sc_time tCCD_L_WR_slr; + const sc_time tCCD_S_WR_slr; + const sc_time tCCD_WR_dlr; + const sc_time tCCD_WR_dpr; + const sc_time + const sc_time + const sc_time + const sc_time + const sc_time + const sc_time + const sc_time + const sc_time + + // Currents and Voltages: + // TODO: to be completed + + virtual sc_time getRefreshIntervalPB() const override; + virtual sc_time getRefreshIntervalAB() const override; + + virtual sc_time getExecutionTime(Command, const tlm::tlm_generic_payload &) const override; + virtual TimeInterval getIntervalOnDataStrobe(Command) const override; +}; + +#endif // MEMSPECDDR5_H