scorrea
|
153d68dee8
|
base file removed
|
2020-06-30 15:58:23 +02:00 |
|
scorrea
|
5db27a8b17
|
undone changes to cov test
|
2020-06-30 12:59:24 +02:00 |
|
scorrea
|
cdb1693687
|
Merge branch 'ci_tests' of https://git.eit.uni-kl.de/ems/astdm/dram.sys into ci_tests
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2020-06-30 12:34:46 +02:00 |
|
scorrea
|
9241689b99
|
cov test updated
|
2020-06-30 12:33:12 +02:00 |
|
Lukas Steiner
|
117937f4aa
|
Includes flag for coverage build.
|
2020-06-30 11:15:46 +02:00 |
|
scorrea
|
066f22c798
|
cov path modified
|
2020-06-26 15:56:22 +02:00 |
|
scorrea
|
bc8f2aaeca
|
ci build and path updated4
|
2020-06-26 11:44:10 +02:00 |
|
scorrea
|
c97c3b87f6
|
ci build and path updated3
|
2020-06-26 11:34:35 +02:00 |
|
scorrea
|
79574c83ec
|
ci build and path updated2
|
2020-06-26 11:31:55 +02:00 |
|
scorrea
|
3c00374d39
|
ci build and path updated
|
2020-06-26 11:29:22 +02:00 |
|
scorrea
|
1751e0c6cd
|
ci build and path updated
|
2020-06-26 11:22:53 +02:00 |
|
scorrea
|
416b1bbcc7
|
coverage added to CMakelists
|
2020-06-26 09:43:13 +02:00 |
|
scorrea
|
5a75a62760
|
coverage flags changed
|
2020-06-24 18:35:50 +02:00 |
|
scorrea
|
8ed64a85cf
|
--coverage option
|
2020-06-24 18:05:01 +02:00 |
|
scorrea
|
542a7d9f32
|
gcov option passed to GCC
|
2020-06-24 17:53:56 +02:00 |
|
scorrea
|
2e5483e122
|
ddr3 ci.yml file corrected
|
2020-06-24 16:15:43 +02:00 |
|
scorrea
|
4cf1f2c0b4
|
.tdb in expected folders excluded from gitignore
|
2020-06-23 12:07:02 +02:00 |
|
scorrea
|
26c2c7f66f
|
HBM2 ci.yml correction
|
2020-06-23 11:45:54 +02:00 |
|
scorrea
|
c016959d50
|
traceAnalyzer tests excluded from ci tests
|
2020-06-23 11:09:17 +02:00 |
|
scorrea
|
54f3285b17
|
HBM2 test to dual-channel/ DDR2 memspecs updated
|
2020-06-20 16:12:35 +02:00 |
|
scorrea
|
81c67fb1d3
|
NumberOfMemChannels to nbrOfChannels
|
2020-06-18 15:45:27 +02:00 |
|
scorrea
|
5cbfa36339
|
PAGE POLICIES AND TRACES MODIFIED
|
2020-06-18 12:39:50 +02:00 |
|
scorrea
|
295810ac1b
|
ci tests traces and memspec modified
|
2020-06-18 10:40:37 +02:00 |
|
Lukas Steiner
|
b5eaf936ac
|
Merge branch 'refb_multicycle_fix' into ci_tests
# Conflicts:
# DRAMSys/tests/DDR4/configs/memspecs/MICRON_4Gb_DDR4-1866_8bit_A.json
# DRAMSys/tests/ddr3_multirank/configs/memspecs/MICRON_2GB_DDR3-1066_64bit_D_SODIMM.json
# DRAMSys/tests/ddr4_bankgroups/configs/simulator/ddr4.json
# DRAMSys/tests/lpddr4/configs/memspecs/JEDEC_8Gb_LPDDR4-3200_16bit.json
|
2020-06-16 13:43:14 +02:00 |
|
Lukas Steiner
|
5f57c29224
|
Per-bank refresh fix.
|
2020-06-16 13:24:20 +02:00 |
|
scorrea
|
ab206aa688
|
ci.yml edited
|
2020-06-16 11:50:11 +02:00 |
|
scorrea
|
b2b70d3771
|
ci and test files modified/some old tests deleted
|
2020-06-16 11:25:49 +02:00 |
|
Lukas Steiner
|
4265ecc3c7
|
Adapted memspecs to nbrOfChannels and nbrOfDevicesOnDIMM.
|
2020-06-16 10:53:43 +02:00 |
|
scorrea
|
a3592e15ba
|
Nr of channel and devices per DIMM at memspec file
|
2020-06-15 18:24:16 +02:00 |
|
scorrea
|
3f8f12358b
|
new test files
|
2020-06-10 12:32:20 +02:00 |
|
Lukas Steiner
|
84f492c910
|
Merge branch 'pct_fix_merge' into 'development'
Adapt PCT project to new recording structure.
See merge request ems/astdm/dram.sys!255
|
2020-06-09 16:07:52 +02:00 |
|
Lukas Steiner
|
14b93bd145
|
Adapt PCT project to new recording structure.
|
2020-06-09 16:06:27 +02:00 |
|
Lukas Steiner
|
409556ef57
|
Merge branch 'opensource_splitting' into 'development'
Open source splitting simplifications
See merge request ems/astdm/dram.sys!253
|
2020-06-05 16:42:12 +02:00 |
|
Lukas Steiner
|
ca4bb46e10
|
Revised cmake files.
|
2020-06-05 16:19:36 +02:00 |
|
Lukas Steiner
|
f98138b994
|
Fixed build with 3D-ICE.
|
2020-06-05 14:47:52 +02:00 |
|
Lukas Steiner
|
0f302b8e80
|
Removed old resource files.
|
2020-06-04 15:58:09 +02:00 |
|
Lukas Steiner
|
0f68b148e1
|
Merge remote-tracking branch 'origin/development' into opensource_splitting
# Conflicts:
# DRAMSys/library/resources/simulations/sms-example.json
|
2020-06-03 20:05:51 +02:00 |
|
Lukas Steiner
|
37f579e36e
|
Included splitting into gem5.
|
2020-06-03 19:59:38 +02:00 |
|
Lukas Steiner
|
4f612afc89
|
Build process adaption.
|
2020-06-03 16:19:24 +02:00 |
|
Lukas Steiner
|
6d255af114
|
Merge branch 'metrics_fix' into 'development'
Fixes json parsing in metrics and wrong mapping.
See merge request ems/astdm/dram.sys!250
|
2020-06-03 14:59:31 +02:00 |
|
Lukas Steiner
|
8f1131e8b8
|
Fixed json parsing in metrics and wrong mapping.
|
2020-06-03 14:57:41 +02:00 |
|
Lukas Steiner
|
c699ad9e53
|
Created DRAMSysRecordable for easy removing of recording.
|
2020-06-02 19:08:07 +02:00 |
|
Lukas Steiner
|
ef8b8ff7c7
|
Moved trace player files from library to simulator.
|
2020-06-02 14:02:08 +02:00 |
|
Lukas Steiner
|
9d390b9074
|
Included configuration loader into configuration class.
|
2020-06-02 10:43:09 +02:00 |
|
Lukas Steiner
|
7d0f001763
|
Made timings const.
|
2020-05-29 17:38:55 +02:00 |
|
scorrea
|
89490e2790
|
correct some addressmapping and simulation files
|
2020-05-29 13:38:14 +02:00 |
|
Lukas Steiner
|
fdf4ce913e
|
Moved memspec parsing into constructors.
|
2020-05-28 23:54:17 +02:00 |
|
Lukas Steiner
|
64538d8ab0
|
Removed unused util functions.
|
2020-05-28 16:50:15 +02:00 |
|
Lukas Steiner
|
4fdc138628
|
Merge branch 'memspec_config_updates' into 'development'
Add missing timing parameters to memspecs.
See merge request ems/astdm/dram.sys!249
|
2020-05-28 15:28:56 +02:00 |
|
Lukas Steiner
|
d8b188bfb7
|
Added missing timing parameters to memspecs.
|
2020-05-27 18:22:49 +02:00 |
|