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Adapt PCT project to new recording structure.

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This commit is contained in:
Lukas Steiner
2020-06-09 16:06:27 +02:00
parent 409556ef57
commit 14b93bd145
11 changed files with 38 additions and 15 deletions
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3
DRAMSys/library/src/common/TlmRecorder.cpp
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@@ -95,8 +95,7 @@ void TlmRecorder::recordPhase(tlm_generic_payload &trans,
if (currentTransactionsInSystem.count(&trans) == 0)
introduceTransactionSystem(trans);
//std::string phaseName = phaseNameToString(phase);
std::string phaseName = phase.get_name();
std::string phaseName = getPhaseName(phase);
std::string phaseBeginPrefix = "BEGIN_";
std::string phaseEndPrefix = "END_";

7
DRAMSys/library/src/common/utils.cpp
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@@ -65,6 +65,13 @@ sc_time TimeInterval::getLength()
return start - end;
}
std::string getPhaseName(tlm_phase phase)
{
std::ostringstream oss;
oss << phase;
return oss.str();
}
json parseJSON(std::string path)
{
try

2
DRAMSys/library/src/common/utils.h
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@@ -102,6 +102,8 @@ static inline void loadbar(unsigned int x,
std::cout << "|\r" << std::flush;
}
std::string getPhaseName(tlm::tlm_phase phase);
nlohmann::json parseJSON(std::string path);
bool parseBool(nlohmann::json &obj, std::string name);
unsigned int parseUint(nlohmann::json &obj, std::string name);

2
DRAMSys/library/src/controller/Controller.cpp
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@@ -349,7 +349,7 @@ tlm_sync_enum Controller::nb_transport_fw(tlm_generic_payload &trans,
else
SC_REPORT_FATAL("Controller", "nb_transport_fw in controller was triggered with unknown phase");
PRINTDEBUGMESSAGE(name(), "[fw] " + std::string(phase.get_name()) + " notification in " +
PRINTDEBUGMESSAGE(name(), "[fw] " + getPhaseName(phase) + " notification in " +
notificationDelay.to_string());
return TLM_ACCEPTED;

2
DRAMSys/library/src/controller/ControllerRecordable.cpp
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@@ -80,7 +80,7 @@ void ControllerRecordable::recordPhase(tlm_generic_payload &trans, tlm_phase pha
unsigned int col __attribute__((unused)) = DramExtension::getExtension(trans).getColumn().ID();
uint64_t id __attribute__((unused)) = DramExtension::getExtension(trans).getPayloadID();
PRINTDEBUGMESSAGE(name(), "Recording " + std::string(phase.get_name()) + " thread " +
PRINTDEBUGMESSAGE(name(), "Recording " + getPhaseName(phase) + " thread " +
std::to_string(thr) + " channel " + std::to_string(ch) + " bank group " + std::to_string(
bg) + " bank " + std::to_string(bank) + " row " + std::to_string(row) + " column " +
std::to_string(col) + " id " + std::to_string(id) + " at " + recTime.to_string());

4
DRAMSys/library/src/simulation/Arbiter.cpp
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@@ -93,7 +93,7 @@ tlm_sync_enum Arbiter::nb_transport_fw(int id, tlm_generic_payload &payload,
notDelay += Configuration::getInstance().memSpec->tCK;
}
PRINTDEBUGMESSAGE(name(), "[fw] " + std::string(phase.get_name()) + " notification in " +
PRINTDEBUGMESSAGE(name(), "[fw] " + getPhaseName(phase) + " notification in " +
notDelay.to_string());
payloadEventQueue.notify(payload, phase, notDelay);
return TLM_ACCEPTED;
@@ -107,7 +107,7 @@ tlm_sync_enum Arbiter::nb_transport_bw(int channelId, tlm_generic_payload &paylo
// Check channel ID
assert((unsigned int)channelId == DramExtension::getExtension(payload).getChannel().ID());
PRINTDEBUGMESSAGE(name(), "[bw] " + std::string(phase.get_name()) + " notification in " +
PRINTDEBUGMESSAGE(name(), "[bw] " + getPhaseName(phase) + " notification in " +
bwDelay.to_string());
payloadEventQueue.notify(payload, phase, bwDelay);
return TLM_ACCEPTED;

6
DRAMSys/library/src/simulation/DRAMSys.cpp
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@@ -60,6 +60,12 @@
#include "dram/DramGDDR6.h"
#include "../controller/Controller.h"
DRAMSys::DRAMSys(sc_module_name name,
std::string simulationToRun,
std::string pathToResources)
: DRAMSys(name, simulationToRun, pathToResources, true)
{}
DRAMSys::DRAMSys(sc_module_name name,
std::string simulationToRun,
std::string pathToResources,

3
DRAMSys/library/src/simulation/DRAMSys.h
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@@ -63,8 +63,7 @@ public:
SC_HAS_PROCESS(DRAMSys);
DRAMSys(sc_module_name name,
std::string simulationToRun,
std::string pathToResources)
: DRAMSys(name, simulationToRun, pathToResources, true) {}
std::string pathToResources);
virtual ~DRAMSys();

2
DRAMSys/library/src/simulation/dram/DramRecordable.cpp
View File

@@ -95,7 +95,7 @@ void DramRecordable<BaseDram>::recordPhase(tlm_generic_payload &trans, tlm_phase
unsigned int row __attribute__((unused)) = DramExtension::getExtension(trans).getRow().ID();
unsigned int col __attribute__((unused)) = DramExtension::getExtension(trans).getColumn().ID();
PRINTDEBUGMESSAGE(this->name(), "Recording " + std::string(phase.get_name()) + " thread " +
PRINTDEBUGMESSAGE(this->name(), "Recording " + getPhaseName(phase) + " thread " +
std::to_string(thr) + " channel " + std::to_string(ch) + " bank group " + std::to_string(
bg) + " bank " + std::to_string(bank) + " row " + std::to_string(row) + " column " +
std::to_string(col) + " at " + recTime.to_string());

5
DRAMSys/pct/createPlatform.tcl
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@@ -44,7 +44,8 @@
::pct::set_dynamic_port_arrays_flag true
::pct::set_import_scml_properties_flag true
::pct::load_all_modules "--set-category" "dummy.h"
::pct::create_instance Project:DRAMSys /HARDWARE i_DRAMSys DRAMSys {DRAMSys(simulationToRun, pathToResources)}
#::pct::create_instance Project:DRAMSys /HARDWARE i_DRAMSys DRAMSys {DRAMSys(simulationToRun, pathToResources)}
::pct::create_instance Project:DRAMSysRecordable /HARDWARE i_DRAMSys DRAMSysRecordable {DRAMSysRecordable(simulationToRun, pathToResources)}
# Add DRAMSys Library // ../[glob -type d ../../build*]/simulator/
::pct::set_simulation_build_project_setting Debug Libraries "sqlite3 DRAMSysLibrary DRAMPower"
@@ -61,7 +62,7 @@
# Configure DDR3 Example:
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} pathToResources ../../library/resources/
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../library/resources/simulations/ddr3-example.xml
::pct::set_param_value /HARDWARE/i_DRAMSys {Constructor Arguments} simulationToRun ../../library/resources/simulations/ddr3-example.json
# Build Rest of the Example system:
::pct::open_library "GFRBM"

17
DRAMSys/pct/dummy.h
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@@ -31,10 +31,11 @@
*
* Authors:
* Matthias Jung
* Lukas Steiner
*/
#ifndef DRAMSYS_H_
#define DRAMSYS_H_
#ifndef DUMMY_H
#define DUMMY_H
#include <string>
#include <systemc>
@@ -48,7 +49,7 @@
* real module...
*/
class DRAMSys: public sc_module
class DRAMSys : public sc_module
{
public:
tlm_utils::multi_passthrough_target_socket<DRAMSys> tSocket;
@@ -61,5 +62,13 @@ public:
string pathToResources);
};
#endif /* SIMULATIONMANAGER_H_ */
class DRAMSysRecordable : public DRAMSys
{
public:
DRAMSysRecordable(sc_module_name name,
std::string simulationToRun,
std::string pathToResources);
};
#endif // DUMMY_H