correct some addressmapping and simulation files

This commit is contained in:
scorrea
2020-05-29 13:38:14 +02:00
parent 4fdc138628
commit 89490e2790
20 changed files with 77 additions and 62 deletions

View File

@@ -1,5 +1,9 @@
{
"CONGEN": {
"BANKGROUP_BIT":[
30,
31
],
"BANK_BIT": [
28,
29
@@ -39,4 +43,4 @@
27
]
}
}
}

View File

@@ -1,5 +1,12 @@
{
"CONGEN": {
"RANK_BIT":[
29
],
"BANKGROUP_BIT":[
27,
28
],
"BANK_BIT": [
25,
26
@@ -36,4 +43,4 @@
24
]
}
}
}

View File

@@ -1,5 +1,9 @@
{
"CONGEN": {
"RANK_BIT":[
30,
31
],
"BANK_BIT": [
27,
28,
@@ -39,4 +43,4 @@
26
]
}
}
}

View File

@@ -1,10 +1,10 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_rbc.xml",
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_rbc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3_boot_linux.xml",
"simconfig": "ddr3_boot_linux.json",
"simulationid": "ddr3-boot-linux",
"thermalconfig": "config.xml"
"thermalconfig": "config.json"
}
}
}

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml",
"mcconfig": "fifo.xml",
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifo.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G_less_refresh.json",
"simconfig": "ddr3_ecc.xml",
"simconfig": "ddr3_ecc.json",
"simulationid": "ddr3-ecc",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,

View File

@@ -1,10 +1,10 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_rbc.json",
"addressmapping": "congen_extended_solution.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3.json",
"simulationid": "ddr3-example",
"simulationid": "ddr3-example-all-json",
"thermalconfig": "config.json",
"tracesetup": [
{

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml",
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3.xml",
"simconfig": "ddr3.json",
"simulationid": "ddr3-example2",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 300,

View File

@@ -1,10 +1,10 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml",
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3_gem5_se.xml",
"simconfig": "ddr3_gem5_se.json",
"simulationid": "ddr3-gem5-se",
"thermalconfig": "config.xml"
"thermalconfig": "config.json"
}
}
}

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_ddr3_1Gbx8_p1KB_brc.xml",
"addressmapping": "am_ddr3_1Gbx8_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3-single-device.xml",
"simconfig": "ddr3-single-device.json",
"simulationid": "ddr3-single-device",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 200,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.xml",
"addressmapping": "am_ddr3_8x1Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "MICRON_1Gb_DDR3-1600_8bit_G.json",
"simconfig": "ddr3.xml",
"simconfig": "ddr3.json",
"simulationid": "ddr3_postpone_ref_test",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_ddr4_8x4Gbx8_dimm_p1KB_brc.xml",
"addressmapping": "am_ddr4_8x4Gbx8_dimm_p1KB_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "JEDEC_4Gb_DDR4-1866_8bit_A.json",
"simconfig": "ddr4.xml",
"simconfig": "ddr4.json",
"simulationid": "ddr4-example",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 200,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_hbm2_8Gb_pc_brc.xml",
"addressmapping": "am_hbm2_8Gb_pc_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "HBM2.json",
"simconfig": "hbm2.xml",
"simconfig": "hbm2.json",
"simulationid": "hbm2-example",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_lpddr4_8Gbx16_brc.xml",
"addressmapping": "am_lpddr4_8Gbx16_brc.json",
"mcconfig": "fifoStrict.json",
"memspec": "JEDEC_8Gb_LPDDR4-3200_16bit.json",
"simconfig": "lpddr4.xml",
"simconfig": "lpddr4.json",
"simulationid": "lpddr4-example",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 200,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_ranktest.xml",
"addressmapping": "am_ranktest.json",
"mcconfig": "fifoStrict.json",
"memspec": "memspec_ranktest.json",
"simconfig": "ddr3.xml",
"simconfig": "ddr3.json",
"simulationid": "ranktest",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 200,

View File

@@ -1,10 +1,10 @@
{
"simulation": {
"addressmapping": "rgram.xml",
"mcconfig": "rgrmccfg.xml",
"addressmapping": "rgram.json",
"mcconfig": "rgrmccfg.json",
"memspec": "rgrspec.json",
"simconfig": "rgrsimcfg-gem5-fs.xml",
"simconfig": "rgrsimcfg-gem5-fs.json",
"simulationid": "rgrsim-gem5-fs",
"thermalconfig": "config.xml"
"thermalconfig": "config.json"
}
}
}

View File

@@ -1,10 +1,10 @@
{
"simulation": {
"addressmapping": "rgram.xml",
"mcconfig": "rgrmccfg.xml",
"addressmapping": "rgram.json",
"mcconfig": "rgrmccfg.json",
"memspec": "rgrspec.json",
"simconfig": "rgrsimcfg-gem5-se.xml",
"simconfig": "rgrsimcfg-gem5-se.json",
"simulationid": "rgrsim-gem5-se",
"thermalconfig": "config.xml"
"thermalconfig": "config.json"
}
}
}

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "rgram.xml",
"mcconfig": "rgrmccfg.xml",
"addressmapping": "rgram.json",
"mcconfig": "rgrmccfg.json",
"memspec": "rgrspec.json",
"simconfig": "rgrsimcfg.xml",
"simconfig": "rgrsimcfg.json",
"simulationid": "rgrsimid",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_wideio.xml",
"mcconfig": "sms.xml",
"addressmapping": "am_wideio.json",
"mcconfig": "sms.json",
"memspec": "wideio.json",
"simconfig": "sms.xml",
"simconfig": "sms.json",
"simulationid": "sms-example",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_wideio.xml",
"addressmapping": "am_wideio.json",
"mcconfig": "fifo.json",
"memspec": "wideio_less_refresh.json",
"simconfig": "wideio_ecc.xml",
"simconfig": "wideio_ecc.json",
"simulationid": "wideio-ecc",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,

View File

@@ -1,11 +1,11 @@
{
"simulation": {
"addressmapping": "am_wideio.xml",
"addressmapping": "am_wideio.json",
"mcconfig": "fifoStrict.json",
"memspec": "wideio.json",
"simconfig": "wideio.xml",
"simconfig": "wideio.json",
"simulationid": "wideio-example",
"thermalconfig": "config.xml",
"thermalconfig": "config.json",
"tracesetup": [
{
"clkMhz": 1000,