Added missing timing parameters to memspecs.

This commit is contained in:
Lukas Steiner
2020-05-27 18:22:49 +02:00
parent 5d404267af
commit d8b188bfb7
49 changed files with 214 additions and 336 deletions

View File

@@ -56,6 +56,10 @@
"XPDLL": 325,
"XS": 324,
"XSDLL": 512,
"ACTPDEN": 2,
"PRPDEN": 2,
"REFPDEN": 2,
"RTRS": 1,
"clkMhz": 1200
}
}

View File

@@ -57,7 +57,8 @@
"WR": 3,
"WTR": 3,
"XP": 2,
"XS": 20,
"XSR": 20,
"RTRS": 1,
"clkMhz": 200
}
}

View File

@@ -57,7 +57,8 @@
"WR": 4,
"WTR": 4,
"XP": 3,
"XS": 27,
"XSR": 27,
"RTRS": 1,
"clkMhz": 266
}
}

View File

@@ -1,67 +0,0 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 4,
"dataRate": 1,
"nbrOfBanks": 4,
"nbrOfColumns": 128,
"nbrOfRanks": 1,
"nbrOfRows": 2048,
"width": 128
},
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
"memoryType": "WIDEIO_SDR",
"mempowerspec": {
"idd0": 5.88,
"idd02": 21.18,
"idd2n": 0.13,
"idd2n2": 4.04,
"idd2p0": 0.05,
"idd2p02": 0.17,
"idd2p1": 0.05,
"idd2p12": 0.17,
"idd3n": 0.52,
"idd3n2": 6.55,
"idd3p0": 0.25,
"idd3p02": 1.49,
"idd3p1": 0.25,
"idd3p12": 1.49,
"idd4r": 1.41,
"idd4r2": 85.73,
"idd4w": 1.42,
"idd4w2": 60.79,
"idd5": 14.43,
"idd52": 48.17,
"idd6": 0.07,
"idd62": 0.27,
"vdd": 1.8,
"vdd2": 1.2
},
"memtimingspec": {
"AL": 0,
"CCD": 1,
"CKE": 3,
"CKESR": 3,
"CL": 3,
"DQSCK": 1,
"RAS": 9,
"RC": 12,
"RCD": 4,
"REFI": 3120,
"RFC": 18,
"RL": 3,
"RP": 4,
"RRD": 2,
"RTP": 4,
"TAW": 10,
"WL": 1,
"WR": 3,
"WTR": 4,
"XP": 2,
"XPDLL": 2,
"XS": 20,
"XSDLL": 20,
"clkMhz": 200
}
}
}

View File

@@ -1,67 +0,0 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 4,
"dataRate": 1,
"nbrOfBanks": 4,
"nbrOfColumns": 128,
"nbrOfRanks": 1,
"nbrOfRows": 2048,
"width": 128
},
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-266_128bit",
"memoryType": "WIDEIO_SDR",
"mempowerspec": {
"idd0": 6.06,
"idd02": 21.82,
"idd2n": 0.16,
"idd2n2": 4.76,
"idd2p0": 0.05,
"idd2p02": 0.17,
"idd2p1": 0.05,
"idd2p12": 0.17,
"idd3n": 0.58,
"idd3n2": 7.24,
"idd3p0": 0.25,
"idd3p02": 1.49,
"idd3p1": 0.25,
"idd3p12": 1.49,
"idd4r": 1.82,
"idd4r2": 111.22,
"idd4w": 1.82,
"idd4w2": 78.0,
"idd5": 14.48,
"idd52": 48.34,
"idd6": 0.07,
"idd62": 0.27,
"vdd": 1.8,
"vdd2": 1.2
},
"memtimingspec": {
"AL": 0,
"CCD": 1,
"CKE": 3,
"CKESR": 6,
"CL": 3,
"DQSCK": 1,
"RAS": 12,
"RC": 16,
"RCD": 5,
"REFI": 3120,
"RFC": 24,
"RL": 3,
"RP": 5,
"RRD": 3,
"RTP": 4,
"TAW": 14,
"WL": 1,
"WR": 4,
"WTR": 6,
"XP": 3,
"XPDLL": 3,
"XS": 27,
"XSDLL": 27,
"clkMhz": 266
}
}
}

View File

@@ -58,6 +58,10 @@
"XPDLL": 255,
"XS": 252,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 933
}
}

View File

@@ -58,6 +58,10 @@
"XPDLL": 325,
"XS": 324,
"XSDLL": 512,
"ACTPDEN": 2,
"PRPDEN": 2,
"REFPDEN": 2,
"RTRS": 1,
"clkMhz": 1200
}
}

View File

@@ -21,6 +21,7 @@
"RCD": 8,
"RCPB": 24,
"REFI": 1560,
"REFIPB": 195,
"REFM": 1,
"RFCAB": 72,
"RFCPB": 36,
@@ -33,7 +34,8 @@
"WR": 8,
"WTR": 4,
"XP": 3,
"XS": 76,
"XSR": 76,
"RTRS": 1,
"clkMhz": 400
}
}

View File

@@ -20,7 +20,8 @@
"RCAB": 34,
"RCD": 10,
"RCPB": 32,
"REFI": 2078,
"REFI": 2080,
"REFIPB": 260,
"REFM": 1,
"RFCAB": 96,
"RFCPB": 48,
@@ -33,7 +34,8 @@
"WR": 11,
"WTR": 6,
"XP": 4,
"XS": 102,
"XSR": 102,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -11,6 +11,56 @@
},
"memoryId": "JEDEC_8Gb_LPDDR4-3200_16bit",
"memoryType": "LPDDR4",
"mempowerspec": {
"idd0": 3.5,
"idd02": 45.0,
"idd0ql": 0.75,
"idd2n": 2.0,
"idd2n2": 27.0,
"idd2nQ": 0.75,
"idd2ns": 2.0,
"idd2ns2": 23.0,
"idd2nsq": 0.75,
"idd2p": 1.2,
"idd2p2": 3.0,
"idd2pQ": 0.75,
"idd2ps": 1.2,
"idd2ps2": 3.0,
"idd2psq": 0.75,
"idd3n": 2.25,
"idd3n2": 30.0,
"idd3nQ": 0.75,
"idd3ns": 2.25,
"idd3ns2": 30.0,
"idd3nsq": 0.75,
"idd3p": 1.2,
"idd3p2": 9.0,
"idd3pQ": 0.75,
"idd3ps": 1.2,
"idd3ps2": 9.0,
"idd3psq": 0.75,
"idd4r": 2.25,
"idd4r2": 275.0,
"idd4rq": 150.0,
"idd4w": 2.25,
"idd4w2": 210.0,
"idd4wq": 55.0,
"idd5": 10.0,
"idd52": 90.0,
"idd5ab": 2.5,
"idd5ab2": 30.0,
"idd5abq": 0.75,
"idd5b": 2.5,
"idd5b2": 30.0,
"idd5bq": 0.75,
"idd5q": 0.75,
"idd6": 0.3,
"idd62": 0.5,
"idd6q": 0.1,
"vdd": 1.8,
"vdd2": 1.1,
"vddq": 1.1
},
"memtimingspec": {
"CCD": 8,
"CKE": 12,

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 10,
"XS": 48,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 400
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 16,
"XS": 80,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 666
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 92,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 92,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 92,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 92,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 136,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 136,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 136,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 136,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -56,6 +56,10 @@
"XPDLL": 255,
"XS": 252,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 933
}
}

View File

@@ -56,6 +56,10 @@
"XPDLL": 325,
"XS": 324,
"XSDLL": 512,
"ACTPDEN": 2,
"PRPDEN": 2,
"REFPDEN": 2,
"RTRS": 1,
"clkMhz": 1200
}
}

View File

@@ -1,35 +0,0 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 4,
"dataRate": 1,
"nbrOfBanks": 8,
"nbrOfRows": 2048,
"width": 128
},
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
"memoryType": "WIDEIO_SDR",
"memtimingspec": {
"AL": 0,
"CCD": 1,
"CKE": 3,
"CKESR": 3,
"RAS": 6,
"RC": 9,
"RCD": 3,
"REFI": 300,
"RFC": 22,
"RL": 3,
"RP": 3,
"RRD": 2,
"RTP": 4,
"TAW": 10,
"WL": 1,
"WR": 2,
"WTR": 3,
"XP": 2,
"XS": 2,
"clkMhz": 166
}
}
}

View File

@@ -1,35 +0,0 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 4,
"dataRate": 1,
"nbrOfBanks": 8,
"nbrOfRows": 2048,
"width": 128
},
"memoryId": "JEDEC_256Mb_WIDEIO_SDR-200_128bit",
"memoryType": "WIDEIO_SDR",
"memtimingspec": {
"AL": 0,
"CCD": 1,
"CKE": 3,
"CKESR": 3,
"RAS": 6,
"RC": 9,
"RCD": 3,
"REFI": 1300,
"RFC": 22,
"RL": 3,
"RP": 3,
"RRD": 2,
"RTP": 4,
"TAW": 10,
"WL": 1,
"WR": 2,
"WTR": 3,
"XP": 2,
"XS": 20,
"clkMhz": 166
}
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 533
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 20,
"XS": 96,
"XSDLL": 512,
"ACTPDEN": 1,
"PRPDEN": 1,
"REFPDEN": 1,
"RTRS": 1,
"clkMhz": 800
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 2,
"PRPDEN": 2,
"REFPDEN": 2,
"RTRS": 1,
"clkMhz": 1200
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 2,
"PRPDEN": 2,
"REFPDEN": 2,
"RTRS": 1,
"clkMhz": 1200
}
}

View File

@@ -49,6 +49,10 @@
"XPDLL": 13,
"XS": 64,
"XSDLL": 512,
"ACTPDEN": 2,
"PRPDEN": 2,
"REFPDEN": 2,
"RTRS": 1,
"clkMhz": 1200
}
}

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@@ -1,62 +0,0 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 4,
"dataRate": 1,
"nbrOfBanks": 8,
"nbrOfColumns": 128,
"nbrOfRows": 8192,
"width": 128
},
"memoryId": "Matze_WideIO",
"memoryType": "WIDEIO_SDR",
"mempowerspec": {
"idd0": 5.88,
"idd02": 21.18,
"idd2n": 0.13,
"idd2n2": 4.04,
"idd2p0": 0.05,
"idd2p02": 0.17,
"idd2p1": 0.05,
"idd2p12": 0.17,
"idd3n": 0.52,
"idd3n2": 6.55,
"idd3p0": 0.25,
"idd3p02": 1.49,
"idd3p1": 0.25,
"idd3p12": 1.49,
"idd4r": 1.41,
"idd4r2": 85.73,
"idd4w": 1.42,
"idd4w2": 60.79,
"idd5": 14.43,
"idd52": 48.17,
"idd6": 0.07,
"idd62": 0.27,
"vdd": 1.8,
"vdd2": 1.2
},
"memtimingspec": {
"AL": 0,
"CCD": 1,
"CKE": 3,
"CKESR": 3,
"RAS": 6,
"RC": 9,
"RCD": 3,
"REFI": 1300,
"RFC": 22,
"RL": 3,
"RP": 3,
"RRD": 2,
"RTP": 4,
"TAW": 10,
"WL": 1,
"WR": 2,
"WTR": 3,
"XP": 2,
"XS": 20,
"clkMhz": 166
}
}
}

View File

@@ -1,62 +0,0 @@
{
"memspec": {
"memarchitecturespec": {
"burstLength": 4,
"dataRate": 1,
"nbrOfBanks": 8,
"nbrOfColumns": 128,
"nbrOfRows": 8192,
"width": 128
},
"memoryId": "wideio_less_refresh",
"memoryType": "WIDEIO_SDR",
"mempowerspec": {
"idd0": 5.88,
"idd02": 21.18,
"idd2n": 0.13,
"idd2n2": 4.04,
"idd2p0": 0.05,
"idd2p02": 0.17,
"idd2p1": 0.05,
"idd2p12": 0.17,
"idd3n": 0.52,
"idd3n2": 6.55,
"idd3p0": 0.25,
"idd3p02": 1.49,
"idd3p1": 0.25,
"idd3p12": 1.49,
"idd4r": 1.41,
"idd4r2": 85.73,
"idd4w": 1.42,
"idd4w2": 60.79,
"idd5": 14.43,
"idd52": 48.17,
"idd6": 0.07,
"idd62": 0.27,
"vdd": 1.8,
"vdd2": 1.2
},
"memtimingspec": {
"AL": 0,
"CCD": 1,
"CKE": 3,
"CKESR": 3,
"RAS": 6,
"RC": 9,
"RCD": 3,
"REFI": 2791242752,
"RFC": 22,
"RL": 3,
"RP": 3,
"RRD": 2,
"RTP": 4,
"TAW": 10,
"WL": 1,
"WR": 2,
"WTR": 3,
"XP": 2,
"XS": 20,
"clkMhz": 166
}
}
}

View File

@@ -429,7 +429,7 @@ void ConfigurationLoader::loadWideIO2(Configuration &config, json &memspec)
memSpec->numberOfBanks = memSpec->banksPerRank * memSpec->numberOfRanks;
memSpec->numberOfBankGroups = memSpec->groupsPerRank * memSpec->numberOfRanks;
// MemTimings specific for WideIO
// MemTimings specific for WideIO2
std::string timings = "memtimingspec";
memSpec->tDQSCK = memSpec->tCK * parseUint(memspec[timings]["DQSCK"], "DQSCK");
memSpec->tDQSS = memSpec->tCK * parseUint(memspec[timings]["DQSS"], "DQSS");
@@ -451,8 +451,10 @@ void ConfigurationLoader::loadWideIO2(Configuration &config, json &memspec)
memSpec->tWTR = memSpec->tCK * parseUint(memspec[timings]["WTR"], "WTR");
memSpec->tRRD = memSpec->tCK * parseUint(memspec[timings]["RRD"], "RRD");
memSpec->tFAW = memSpec->tCK * parseUint(memspec[timings]["FAW"], "FAW");
memSpec->tREFI = memSpec->tCK * parseUint(memspec[timings]["REFI"], "REFI");
memSpec->tREFIpb = memSpec->tCK * parseUint(memspec[timings]["REFIPB"], "REFIPB");
memSpec->tREFI = memSpec->tCK * (unsigned)(parseUint(memspec[timings]["REFI"], "REFI")
* parseUdouble(memspec[timings]["REFM"], "REFM"));
memSpec->tREFIpb = memSpec->tCK * (unsigned)(parseUint(memspec[timings]["REFIPB"], "REFIPB")
* parseUdouble(memspec[timings]["REFM"], "REFM"));
memSpec->tRFCab = memSpec->tCK * parseUint(memspec[timings]["RFCAB"], "RFCAB");
memSpec->tRFCpb = memSpec->tCK * parseUint(memspec[timings]["RFCPB"], "RFCPB");
memSpec->tRTRS = memSpec->tCK * parseUint(memspec[timings]["RTRS"], "RTRS");