ac59e2aa7c
refactor: remove unused includes from DRAMPower
2025-12-02 15:18:42 +01:00
65580e79f1
fix: incorrect memory size calculation for LP4/5
...
The numberOfDevices was not properly taken into account.
2025-10-22 13:37:41 +02:00
812b540ed5
Make DRAMPower required again
...
DRAMPower was only optional because the linker had problems when
integrating with gem5 as there still exists a very old version in the
source tree.
With the new namespaces, there is no longer a need for making DRAMPower
optional.
2025-05-09 16:45:54 +02:00
marcomoerz
4120e9c35b
Integrate DRAMUtils and new DRAMPower
2025-05-09 16:45:54 +02:00
8268f2e33b
Fix issue with REFP2B with multiple ranks
2025-04-08 12:39:38 +02:00
db615eb6a4
Fix LPDDR5 AllBank and Per2Bank Refresh
2025-03-26 15:10:56 +01:00
ed709b82d4
Integrate new Timing Checker
2025-01-13 10:24:08 +01:00
6d6c8c595f
Clean up private/public linking
2024-12-20 17:40:16 +01:00
ca9ef16d0d
Remove unnecessary project() calls
...
project() should only be called if the subdirectory, in fact, can be
built standalone.
2024-12-20 17:40:15 +01:00
a37171c6fd
Remove file globs from CMakeLists
...
Fix build
2024-12-20 17:40:15 +01:00
e409bab47a
Implement pseudo-channel and rank specific BW information
2024-11-18 13:18:33 +01:00
Lukas Steiner
5a90c017d9
Fix wrong command dependency.
2024-07-05 08:11:39 +00:00
454cb00ddb
Refactor: remove monolithic configuration class
2024-02-23 11:54:51 +01:00
6645a9ed54
Introduce method to convert memspecs to DRAMPower memspecs and cleanup source files
2023-11-14 14:57:25 +01:00
Lukas Steiner
8224e97abe
Reformat all files.
2023-09-21 16:50:59 +02:00
c07d09f392
Format all files
2023-08-29 09:26:25 +02:00
Lukas Steiner
12f2b73cde
Additional check of byte enable pointer.
2023-08-23 15:21:53 +02:00
Lukas Steiner
0f824e8b92
Do not allow masked write in default case.
2023-08-23 11:41:58 +02:00
a539e3c011
Merge branch 'develop' into work/partial_writes
2023-08-23 09:31:42 +02:00
a0f93a75e2
Merge develop
2023-08-21 10:01:08 +02:00
b3937cf63a
Add LPDDR5 Partial Write Support
2023-08-16 11:42:39 +02:00
c5f1320399
Implement Partial Write for DDR5
2023-08-16 09:38:57 +02:00
40dbc518b6
Add hack in TimingCheckers to convert MWR to WR in insertion stage
2023-08-16 09:38:54 +02:00
f7066a22b0
First implementation of Partial Writes
2023-08-16 09:38:54 +02:00
Lukas Steiner
12dcbfd917
Use scoped enums for DRAM types.
2023-06-30 15:49:41 +02:00
Lukas Steiner
ba3f367676
Use type safe index vectors in timing checkers (2/2).
2023-06-21 12:59:26 +02:00
a9759f51fa
Enable warnings in dev preset and fix them
2023-06-09 11:29:15 +02:00
Lukas Steiner
20f6aae787
Replace tabs with whitespaces.
2023-05-25 16:09:55 +02:00
Lukas Steiner
b3955d6d02
Update TUK to RPTU.
2023-05-25 15:15:52 +02:00
69cd04c448
Namespace the complete DRAMSys library
2023-05-17 11:42:00 +02:00
Lukas Steiner
9a1443835d
Merge branch 'develop' into wip/unit_test_preps
...
# Conflicts:
# extensions/standards/DDR5/DRAMSys/controller/checker/CheckerDDR5.cpp
2023-04-14 11:35:32 +02:00
Lukas Steiner
9b31fef555
Use local copies of sc_max_time() instead of calling the function.
2023-04-14 10:03:59 +02:00
d27a29ca80
Refactor configuration library
...
The configuration library has been refactored to make use of nlohmann
macros to reduce boilerplate code.
The nlohmann parser callback is used to decide whether to include
configuration json objects directly, or if they need to be loaded
from a sperate file.
2023-04-13 11:18:39 +02:00
Lukas Steiner
b086fa985d
Change names of LPDDR5 timings from tRCDRD/tRCDWR to tRCD_L/tRCD_S.
2023-03-30 15:06:17 +02:00
5d7171e537
Add LPDDR5X configurations and separate tRCD into tRCDRD and tRCDWR
2023-03-29 16:49:15 +02:00
Lukas Steiner
bb99b9e883
Add fix for LP5 rank2rank timings.
2023-03-20 16:51:36 +01:00
Lukas Steiner
1bd6d61d23
Adapt more paths.
2023-02-22 15:18:17 +01:00
Thomas Psota
f434026ccd
Added extension mechanism and ported DDR5, LPDDR5, HBM3, TraceAnalyzer
2023-02-09 14:22:34 +01:00
