Commit Graph

12499 Commits

Author SHA1 Message Date
Gabe Black
dfec508976 scons,python: Split the marshal binary into a c++ wrapper and script.
The new c++ wrapper is called gem5py, and will run any python script
using gem5's embedded python interpreter. The "marshal" functionality is
split out into a separate python script gem5py can run.

The command line for gem5py should look like this:

gem5py ${SCRIPT TO RUN} ${ARGS TO THE SCRIPT}

So, for instance, to marshal a file called foo.py, the command line
might look like this:

gem5py python/marshal.py foo.py

Also, this change reorders the sources for the python embedding action
and limits the max_sources for Transform() to 1, so that it just shows
the python file being embedded and not gem5py or the marshal.py script.
Those are still sources so dependency tracking works correctly, but they
are also implied and just add visual noise to the build output.

Change-Id: I7ae6bd114973ae44c3b634884b6dafc6577e0788
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49392
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
2021-09-24 18:49:53 +00:00
Bobby R. Bruce
b0c2b278a9 misc: Merge branch v21.1.0.2 hotfix branch into develop
Change-Id: I225dddd6ec1399528f4759a3c5c5e306d8c7a38c
2021-09-22 11:43:57 -07:00
Bobby R. Bruce
ca921387ae misc: Update the version to v21.1.0.2
Change-Id: I4013ed678b367f95bb0f69e4a827ad04995cc3c0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50750
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 18:37:48 +00:00
CHEN Meng
59c4fd07cb base-stats: fix storage initializing
Commit (70194795c3) introduced std::vector with resize() to initializing all storages. This method caused data duplication in statistics. Storage is now initialized using loops.

Change-Id: I4350863a83671fc10cc02b5cb7d3b38e6cf4f565
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50747
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 18:37:48 +00:00
Daniel R. Carvalho
96c9d03fa6 base,tests: Add unit test for SymbolTable
Add a unit test for base/loader/symtab.*.

Change-Id: I81c14826ab629439897235cbaaf79047e603ff8d
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43250
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 15:47:37 +00:00
Giacomo Travaglini
ee95d0f04d arch-arm: SCTLR.WXN not used in S2AP
Change-Id: I141f7088fce0e7eed01491920f84774394143b4a
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50667
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 13:22:58 +00:00
Giacomo Travaglini
17a5422bec arch-arm: Implement Armv8.2 FEAT_UAO
Change-Id: I87b25a65e706ed6486347806a540b1dbf25231cb
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50390
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 13:22:58 +00:00
Giacomo Travaglini
ee0e92a432 arch-arm: Remove SPSR write mask
We are currently masking out the PAN and UAO field when writing
to the SPSR_ELx register.
This is not needed and we should treat them as RES0 instead if
FEAT_PAN and FEAT_UAO are not implemented

Change-Id: Ib65e3744f365825d2414b8092b3a79324be461b4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50389
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-09-22 13:22:58 +00:00
Daniel R. Carvalho
cbffe30e64 sim,tests: Add unit test for sim/serialize.hh
Add a unit test for sim/serialize.hh.

==Bugs==
arrayParamIn cannot parse strings with spaces. Since spaces
are used as delimiters, strings containing spaces are parsed
as multiple entries of the array. The test that checks for
this has been disabled.

==Unexpected Behavior==
Serialization has an unexpected behavior when returning to
previous scopes. For example,

  ...
  SCS scs(cpt, "S1")
  paramOut(cpt, "param1", integer1)
  {
    SCS scs_2(cpt, "S2")
    paramOut(cpt, "param2", integer2)
  }
  paramOut(cpt, "param3", integer3)

will generate the output:
  ...
  [S1]
    param1=1
  [S2]
    param2=2
    param3=3

But the user might expect:
  ...
  [S1]
    param1=1
  [S2]
    param2=2
  [S1]
    param3=3

==Incovenient Behavior==
arrayParamIn with a std::array parameter is slightly
incovenient, since the raw data pointer must be extracted.
It may be worth it to add a template specialization.

==Not Tested==
paramInImpl is not being directly tested because it should
not be used as an external API - paramIn and optParamIn
should be used instead.

arrayParamIn with an InsertIterator parameter is not being
directly tested because the other versions should be used
instead.

Change-Id: If0c8f045aa317790d5fcb32e48629b113b62efc5
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41337
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 05:31:01 +00:00
Daniel R. Carvalho
df928b36f8 sim,tests: Add unit test for sim/serialize_handlers
Add a GTest for the functionality of sim/serialize_handlers.hh.

Change-Id: I1128c7adb12a3c7d091e26db13733ba45e1e61fe
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38776
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 05:31:01 +00:00
Daniel R. Carvalho
7a144c5d59 arch-arm: Fix memory leak of PMU events
Memory of PMU events was never being released.

Change-Id: I3cd9583103333008799f0873af3a490f847a21b5
Issued-on: https://gem5.atlassian.net/browse/GEM5-857
Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38703
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-22 05:31:01 +00:00
Gabe Black
6e23be0693 python: Get rid of ipython 0.10 and older support code.
Version 0.11 was actually the first version of ipython which even
supported python 3 at all, as far as I can tell. Because we have a
requirement to use at least python 3 (and not just 3.0 at that), we can
assume that the user must be using at least version 0.11 of ipython.
That means we can remove code which supported older versions.

Change-Id: I7f88aae9f64f6c6f027be52741cda0686f5ca5be
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50709
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 20:45:07 +00:00
Gabe Black
95cee873ed python: Get rid of version arg in OptionParser constructor.
This will report that gem5 is version 2.0, which is WILDLY out of date.
There are other ways of reporting the version of gem5 which are actually
kept up to date.

Change-Id: Ie09cdc8f3ef59696fe197c3491db102bda41ade0
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50708
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 20:45:07 +00:00
Gabe Black
011dc236d3 python: Get rid of some unused cruft in main.py.
There was some code at the end of main.py which would let you run it
directly. This would parse options passed to the script, and show you
what they equaled.

Also, the "main" function would optionally let you pass in options to
override whatever it would find with parse_arguments. This is no longer
used.

Change-Id: Ib0effa7ac2b4a51b68994372a7c7fcf1c9b4dc13
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50707
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 20:45:07 +00:00
Austin Harris
f42ce27065 sim: Fix hang while terminating threads with fork
It is possible that gem5 is forked multiple times before the threads are
re-created, so don't wait for the barrier if the threads were already
terminated.

Change-Id: Ia04db2f3b1341c4d432178a37812fd882e148ec2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50710
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 15:08:15 +00:00
Gabe Black
bec16fbc31 misc: Move MemPool based calls to the SEWorkload.
These currently proxy to the System object, but this is one step towards
moving the MemPool-s out of the System and into the SEWorkload where
they really should have been from the start.

Change-Id: Id27e7b874c283abf07bd892c8467a9cc52e2fdff
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50342
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 02:05:32 +00:00
Gabe Black
9da405ce96 sim: Set up an SEWorkload pointer in the base Process class.
This will make it easier for the process object to access shared SE
level functionality and info.

Change-Id: I2cbddcabdf7264fde492b0566791d909ce2b10be
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50341
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 02:04:57 +00:00
Gabe Black
a024c9f19e arch-arm: Modify the AAPCS32 ABI implementation to use VecElems.
Use the VecElem register file when using the 32 bit ARM ABI. This is not
only consistent with an upcoming change which will make the 64 bit
vector registers and the 32 bit vector elements no longer act as views
into the same data, it also simplifies the implementation a little.

Change-Id: Ie8f17b764402a6331012f13b7605520512c2d5c9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50207
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 01:33:34 +00:00
Gabe Black
4d398302c4 sim: Make the page shift a member of the MemPool class.
Pass it in through the constructor, rather than have the MemPool call
into the System object every time it needs the page shift. This is
simpler, more efficient, and removes a dependency between the MemPool
class and the System class.

Change-Id: I059bcb0db249251b32bff1beba3eadfe306d9081
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50339
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 01:07:26 +00:00
Gabe Black
6d9cbb9d6e sim: Exclude the m5opRange from the system mempools by construction.
Don't look for the m5opRange in the memory pools when allocating memory
so that it can be skipped, just exclude it from the memory pools
entirely when they are set up. This removes a dependence between the
memory pools and the system class.

Change-Id: I0d88c1bc2f889f32b234073cff8988319fb36ea5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50338
Reviewed-by: Matthew Poremba <matthew.poremba@amd.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-21 00:58:24 +00:00
Gabe Black
e7bf4db7bd sim: Squash a long standing warning from pybind11.
The module_ constructor which takes a module name and an optional
docstring is deprecated. This change replaces it with the
create_extension_module call that it would result in, which gets rid of
the warning.

Change-Id: I700b4afcf1e5e2548af18e2eb2a7b1214c989807
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50587
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 23:17:46 +00:00
Gabe Black
e9b7f08abb base,python: Expand AddrRange exclude and add subtraction operators.
Expand exclude to work with an AddrRange or AddrRangeList, define
versions to exclude both from an AddrRangeList, and make all available
through subtraction operators. Add -= operators for AddrRangeList with
another AddrRangeList or AddrRange.

Change-Id: Ic48f0c45a4809dbc51e1d3133e8319134aabe29e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50347
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-09-20 20:52:05 +00:00
Gabe Black
416939c5c2 misc: Use AddrRangeList more consistently in the AddrRange class.
We go through the trouble of defining an AddrRangeList typedef, but then
we don't use it consistently and use std::vector<AddrRange> instead.

This change converts the exclude method from using
std::vector<AddrRange> to AddrRangeList, and also adds a constructor
which takes an AddrRangeList.

Because there is a lot of code which uses the std::vector based
constructor, this change does not remove that method.

Change-Id: I1a03b25990025688aa760a67d3e7a2e8141384ce
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50344
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 20:50:30 +00:00
Gabe Black
0998e99131 python: Add a --silent-redirect option to gem5.
This complements the --redirect-stdout and --redirect-stderr options and
supresses the message about where those streams are being redirected
which print to the original stdout.

Usually this is very helpful since it lets you know where to look for
simulator output. If you're running gem5 in an automated environment
like our testing framework however, the file name is a random temp file
which will be deleted as soon as the test is finished running.

The --silent-redirect option can be used in these particular scenarios
to, for example, avoid lots and lots of useless lines in the test output
naming files that no longer exist.

Change-Id: If56b61567b3d98abd9cc9d9e9d661ea561be46f8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50588
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 19:19:59 +00:00
Bobby R. Bruce
b5ffa5418f python: Remove 'is_ruby' function
This function is not used and should not be used. It does not really
make any sense.

Change-Id: I79ee7283ddbc282b9b803df33ad266b7a88a9c67
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50168
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-20 18:44:40 +00:00
Bobby R. Bruce
958029328f python: Add has_dma_ports check to mesi_two_level
Previously the MesiTwoLevelCacheHierarchy assumed the board had dma
ports. This change adds a simple check and skips adding the
DMASequencers if the board does not have any.

Change-Id: I64ee68267d16c9d9a6096ba7fd660f04515b2b3c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49929
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-20 18:44:40 +00:00
Bobby R. Bruce
752394b243 python: Add connect_interrupt() to mesi_two_level for non-X86
The MESITwoLevelCacheHierarchy did not call `connect_interrupt()` on
CPUs if not ISA.X86. This patch fixes this.

Change-Id: I46ae19f588e2eadce60f145067e8a7cef0d44afd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49928
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-20 18:44:40 +00:00
Bobby R. Bruce
77b1338985 arch-riscv,configs,python: Update riscv_fs.py/riscv_board.py
This patch incoporates improvements to the riscv_fs.py and
riscv_board.py:

* Adds 'Resource' objects to download needed resources.
* Adds 'requires' function calls where necessary.

Change-Id: I2ae4f34221d781ed6d71c9f69d56833845f537c4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49867
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-20 18:44:40 +00:00
Bobby R. Bruce
e3d8af0f1a python: Rename 'components_library' to 'gem5.components'
The 'components_library' name was always a placeholder. A more accurate
name would be the 'gem5 library'. This is analogous to standard
libraries shipped as part of programming languages. Over time this will
begin to incorporate more commonly used code at the Python configuration
script level. Most of the former 'components_library' is now in
'gem5.components'.

Change-Id: I5927db7004c43b29c39e7767da3f779627081618
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49691
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 18:44:40 +00:00
Bobby R. Bruce
f775c4c4a7 python: Move the components lib to be compiled in the binary
There has been some debate on how best to distribute the components
library. This change builds the components library into the gem5 binary.
The components library will now function similar to the `m5` library.
There is no need for awkward imports or obtaining the library from some
third-party source.

Additional incorporated in this patch:
* Added `__init__.py` to the Python modules.
* Fixed a typo in the `abstract_ruby_cache_hierarchy.py` filename.
* Ensured that imports within the library are relative.

Issue-on: https://gem5.atlassian.net/browse/GEM5-1023
Change-Id: I3988c8710cda8dcf7b21109a2cf5c3f1608cc71a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49690
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Austin Harris <mail@austin-harris.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 18:44:40 +00:00
Giacomo Travaglini
136809cc45 arch-arm: Use EL0 permission logic when checking unpriv reference
An unprivileged memory reference (LDTR and STTR) executed at EL1
should be regarded as an EL0 memory access

Change-Id: Iae5e6e582f9c5a57340f27a84db463bcb8996922
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50388
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 15:40:05 +00:00
Giacomo Travaglini
fde9e46951 arch-arm: Refactor AArch64 MMU permission check
This refactor of the MMU::checkPermissions64 method is moving
the TLB entry access permission bits (AP,XN...) checking into
new separate stage1 and stage2 helpers

Change-Id: If7d42538f5ea1ec21e918cccaf469fcb6a36d82b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50387
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 15:40:05 +00:00
Giacomo Travaglini
6b2faf3723 arch-arm: Remove unused TLBType
The cached state is global now (per-MMU)

Change-Id: I70bc847813086f678b4ff32722b7f6e3ceaae6f5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50527
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 09:03:19 +00:00
Giacomo Travaglini
377155c10b arch-arm: Syncronize GIC CPU interface when changing EL
From the GIC architecture specification (ihi0069) [1]

"The assertion and de-assertion of IRQs and FIQs are affected by the
current Exception level and Security state of the PE. As part of the
Context Synchronization that occurs as the result of taking or returning
from an exception, the CPU interface ensures that IRQ and FIQ are both
appropriately asserted or deasserted for the Exception level and
Security state that the PE is entering."

Kudos to Quentin Forcioli for finding the bug

[1]: https://developer.arm.com/documentation/ihi0069/latest

Change-Id: I10444a3aad5c06aabc13e1cbd70a32192531a31d
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50508
Reviewed-by: Quentin Forcioli <quentin.forcioli@telecom-paris.fr>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 09:03:19 +00:00
Giacomo Travaglini
4000480a2f arch-arm: Define ArmFault::invoke32 to match invoke64
Just providing some symmetry to the ArmFault::invoke method

Change-Id: I244e69eee684b9935bea49cf28c6ed99a01192bf
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50507
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 09:03:19 +00:00
Quentin Forcioli
36d65d2976 arch-arm: Fixed EL2S system register trapping.
Prevent a disabled El2S from trapping a system register access from EL1S
This commit is part of series of commit to enable booting OPTEE on gem5.

Change-Id: I0258e15b21dd6a69a3e29e88b753825fad648cfd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49987
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 08:01:12 +00:00
Quentin Forcioli
32fd8cfa80 mem: Fix for CFI memory
Subtile modification of the CFI memory to bring back u-boot compatibility :
- Ignoring AMD_RESET_CMD (0xf0)
- Increasing CFIQueryTable size to have 4 Erase Block Region Information (3 are
just empty)

Change-Id: I49e7a78a89a46b1298f04132559debafdeddb8ef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49570
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-20 08:00:53 +00:00
Andreas Sandberg
bec41479af cpu-kvm: Reinitialize threads on drainResume
Event queue service threads may have been re-created while the
simulator was drained. We therefore need to initialize the new thread
by setting correct signal masks and re-attaching performance counters.

Change-Id: Ic0dab80543928327021cade037770c917e73a47f
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50409
Reviewed-by: Austin Harris <mail@austin-harris.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-19 17:32:59 +00:00
Andreas Sandberg
8c685469f1 sim: Fix fork for multithreaded simulations
It is currently not possible to call m5.fork when the simulator is
running in with multiple parallel event queues. The POSIX standard
have very weak guarantees when forking a process with multiple
threads. In order to use fork correctly, we need to ensure that all
helper threads servicing event queues have terminated before the fork
system call is invoked.

There are two ways this could be implemented: 1) Always terminate
helper threads when taking a global simulator exit event, or 2)
terminate helper threads just before fork is called from Python.

This change implements the second strategy since the KVM-based CPUs
currently assume that TIDs don't change unless there is a fork event.

Change-Id: I22feaecd49f7f81689b43185d63a8f14428bed63
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50408
Reviewed-by: Austin Harris <mail@austin-harris.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
2021-09-19 17:32:59 +00:00
Gabe Black
53238f891d arch: Ensure using namespace * doesn't leak from generated ISA files.
Only use "using namespace" with the *ISAInst namespace, not the top
level namespace. Also only using namespace *ISA, and not the gem5
namespace itself. The *ISAInst namespace is already in the gem5
namespace, and so will resolve names in it automatically.

Change-Id: Iebf3c9519c65baba073d73744665f8c98880804c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49887
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-18 19:09:47 +00:00
vsoria
f1ad44b123 cpu-o3: Add Data Abort handler for Atomic Instructions
Bug fixing patch for Data Abort exception when executing an
atomic instruction. You can see the details in this JIRA ticket:
https://gem5.atlassian.net/browse/GEM5-784

Change-Id: I79e7113efd8157fba61b6d4a0b0c09bc6f85ec29
Signed-off-by: Víctor Soria <victor.soria@bsc.es>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35295
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-18 00:13:03 +00:00
Daecheol You
fac84c1fe5 cpu-minor: Fix for minor CPU scoreboard
When the scoreboard checks RAW dependency, it determines whether
the source registers can be forwarded or not to evaluate
relative latency. To do that, fuIndices[index] should be used
as an index for accessing cant_forward_from_fu_indices, not register
index itself. Moreover, since fuIndices[index] is cleared as -1
by clearInstDests(), the first compare should be fuIndices[index] != -1
instead of 1.

Change-Id: Ic62546855a8ad5365064d2ea2e2a0fbc1ccc6f41
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50287
Reviewed-by: ZHENGRONG WANG <seanyukigeek@gmail.com>
Maintainer: ZHENGRONG WANG <seanyukigeek@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-17 10:27:11 +00:00
Gabe Black
649ab2dc98 base: Make the AddrRange::exclude method const.
This should not modify the base AddrRange, and can be marked const.

Change-Id: I8554707ab8dd895d24891acff18013308ab779a6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50337
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Daniel Carvalho <odanrc@yahoo.com.br>
2021-09-16 20:42:41 +00:00
Gabe Black
11d4ebcc5d python: Pull most of the logic in marshal.cc into python.
Put most of the logic in python, and turn the c++ parts into a very
generic wrapper which could meaningfully run any python code under the
interpreter which will be embedded in gem5.

Change-Id: I3f6e50839490eaf0db9a6bd242efbcb8de1b6e24
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49391
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2021-09-16 20:39:30 +00:00
Gabe Black
b0f960f765 scons: Get rid of a loop which touched all the param ptype attributes.
As far as I can tell, this code is left over from when gem5 used SWIG,
and is not necessary any more.

Change-Id: Id36887773d2fc1373ffe689ee1b50b4989bf5a38
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49390
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-16 20:39:30 +00:00
Gabe Black
977b9d7521 scons: Use source filters to exclude python source if --without-python.
We were simply not declaring the source files for PySource files if
built --without-python. Instead, we should declare them, but then
explicitly exclude them if that option is set.

Since we're already doing that, we can simply remove the check from the
PySource constructor.

Change-Id: I437ebeee1082fa00065bedd61f91d5721b915ae5
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49389
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-16 20:39:30 +00:00
Gabe Black
6bbaceca91 scons: Simplify the PySource class slightly.
Demote the cpp attribute to a local variable, and get rid of the unused
"package" attribute.

Change-Id: I190792274ea9bdd9853aa3b6e07ce4151b378251
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49388
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-16 20:39:30 +00:00
Gabe Black
0b06c55520 scons: Eliminate the tnode dict in PySource.
Rather than pass these values to the embedPyFile function indirectly
through python, we should pass them through the environment so SCons can
know about them, and also to simplify the PySource class.

Change-Id: I466613c194bfd965a6f5f34e1e92131834fb8b66
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49387
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
2021-09-16 20:39:30 +00:00
Richard Cooper
40c3839413 scons: Re-enable TRACING_ON flag
The TRACING_ON flag was removed in a previous commit [1], but is still
used by the _check_tracing() function in main.py. This breaks gem5
simulations when debug flags are enabled.

This patch re-enables the TRACING_ON flag.

[1] https://gem5-review.googlesource.com/c/public/gem5/+/48379

Change-Id: I90ed8a46938fa2748b96c1b378329a4ba1ef047e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50427
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-16 10:42:47 +00:00
Andreas Sandberg
ea29c98e68 python: Remove unnecessary Python 2.x workaround
We needed to explicitly cast the return value from getCode() to int to
avoid a Python 2.x issue where sys.exit() got confused by an
unexpected long argument. This isn't an issue in Python 3 since long
has been removed as a separate type.

Change-Id: I7770d0f180e826ac7e6c92c13bc6a61447e3f851
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/50407
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
2021-09-16 08:52:28 +00:00