arch: Ensure using namespace * doesn't leak from generated ISA files.

Only use "using namespace" with the *ISAInst namespace, not the top
level namespace. Also only using namespace *ISA, and not the gem5
namespace itself. The *ISAInst namespace is already in the gem5
namespace, and so will resolve names in it automatically.

Change-Id: Iebf3c9519c65baba073d73744665f8c98880804c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49887
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

src/arch/arm/isa/includes.isa

@@ -70,13 +70,10 @@ output header {{
 #include "mem/packet.hh"
 #include "sim/faults.hh"
 
-namespace gem5
-{
-namespace ArmISAInst
+namespace gem5::ArmISAInst
 {
 using namespace ArmISA;
-} // namespace ArmISAInst
-} // namespace gem5
+} // namespace gem5::ArmISAInst
 
 }};
 
@@ -94,8 +91,10 @@ output decoder {{
 #include "base/loader/symtab.hh"
 #include "cpu/thread_context.hh"
 
-using namespace gem5;
+namespace gem5::ArmISAInst
+{
 using namespace ArmISA;
+} // namespace gem5::ArmISAInst
 }};
 
 output exec {{
@@ -120,7 +119,9 @@ output exec {{
 #include "sim/pseudo_inst.hh"
 #include "sim/sim_exit.hh"
 
-using namespace gem5;
+namespace gem5::ArmISAInst
+{
 using namespace ArmISA;
+} // namespace gem5::ArmISAInst
 
 }};

src/arch/mips/isa/includes.isa

@@ -64,8 +64,10 @@ output decoder {{
 #include "mem/packet.hh"
 #include "sim/full_system.hh"
 
-using namespace gem5;
+namespace gem5::MipsISAInst
+{
 using namespace MipsISA;
+} // namespace gem5::MipsISAInst
 }};
 
 output exec {{
@@ -96,7 +98,8 @@ output exec {{
 #include "sim/sim_events.hh"
 #include "sim/sim_exit.hh"
 
-using namespace gem5;
+namespace gem5::MipsISAInst
+{
 using namespace MipsISA;
+} // namespace gem5::MipsISAInst
 }};
-

src/arch/power/isa/includes.isa

@@ -46,8 +46,10 @@ output header {{
 #include "cpu/static_inst.hh"
 #include "mem/packet.hh"
 
-using namespace gem5;
+namespace gem5::PowerISAInst
+{
 using namespace PowerISA;
+} // namespace gem5::PowerISAInst
 }};
 
 output decoder {{
@@ -60,8 +62,10 @@ output decoder {{
 #include "base/cprintf.hh"
 #include "cpu/thread_context.hh"
 
-using namespace gem5;
+namespace gem5::PowerISAInst
+{
 using namespace PowerISA;
+} // namespace gem5::PowerISAInst
 }};
 
 output exec {{
@@ -78,7 +82,8 @@ output exec {{
 #include "mem/packet_access.hh"
 #include "sim/sim_exit.hh"
 
-using namespace gem5;
+namespace gem5::PowerISAInst
+{
 using namespace PowerISA;
+} // namespace gem5::PowerISAInst
 }};
-

src/arch/riscv/isa/includes.isa

@@ -74,8 +74,10 @@ output decoder {{
 #include "mem/request.hh"
 #include "sim/full_system.hh"
 
-using namespace gem5;
+namespace gem5::RiscvISAInst
+{
 using namespace RiscvISA;
+} // namespace gem5::RiscvISAInst
 }};
 
 output exec {{
@@ -106,6 +108,8 @@ output exec {{
 #include "sim/sim_exit.hh"
 #include "sim/system.hh"
 
-using namespace gem5;
+namespace gem5::RiscvISAInst
+{
 using namespace RiscvISA;
+} // namespace gem5::RiscvISAInst
 }};

src/arch/sparc/isa/includes.isa

@@ -66,8 +66,10 @@ output decoder {{
 #include "cpu/thread_context.hh"  // for Jump::branchTarget()
 #include "mem/packet.hh"
 
-using namespace gem5;
+namespace gem5::SparcISAInst
+{
 using namespace SparcISA;
+} // namespace gem5::SparcISAInst
 }};
 
 output exec {{
@@ -87,7 +89,8 @@ output exec {{
 #include "sim/pseudo_inst.hh"
 #include "sim/sim_exit.hh"
 
-using namespace gem5;
+namespace gem5::SparcISAInst
+{
 using namespace SparcISA;
+} // namespace gem5::SparcISAInst
 }};
-

src/arch/x86/isa/includes.isa

@@ -69,14 +69,10 @@ output header {{
 #include "mem/packet.hh"
 #include "sim/faults.hh"
 
-using namespace gem5;
-using X86ISA::GpRegIndex;
-using X86ISA::FpRegIndex;
-using X86ISA::CtrlRegIndex;
-using X86ISA::CrRegIndex;
-using X86ISA::DbgRegIndex;
-using X86ISA::SegRegIndex;
-
+namespace gem5::X86ISAInst
+{
+using namespace X86ISA;
+} // namespace gem5::X86ISAInst
 }};
 
 output decoder {{
@@ -97,8 +93,10 @@ output decoder {{
 #include "mem/packet.hh"
 #include "sim/full_system.hh"
 
-using namespace gem5;
+namespace gem5::X86ISAInst
+{
 using namespace X86ISA;
+} // namespace gem5::X86ISAInst
 }};
 
 output exec {{
@@ -125,7 +123,8 @@ output exec {{
 #include "sim/pseudo_inst.hh"
 #include "sim/sim_exit.hh"
 
-using namespace gem5;
+namespace gem5::X86ISAInst
+{
 using namespace X86ISA;
+} // namespace gem5::X86ISAInst
 }};
-