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Samuel Stark
52743eb975 mem-ruby: Support for unaddressed mem requests in the Sequencer 
JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I66f7779f447d56e72e1b1f1ca2b84f1b50057542
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57294
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-22 08:55:10 +00:00
Matthew Poremba
8a53add7f8 dev-amdgpu: Fix frame writes for <32-bit writes 
In theory a packet between one and eight bytes can be written to frame
buffer memory from the driver. In gem5 pkt->getLE<utin32_t>() will
assert if the packet size is <32-bits. Change to pkt->getUintX(...) to
fix this issue.

Change-Id: If8554013e4ea7bac90985487991d0bf8bdc765ea
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58852
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-21 21:32:53 +00:00
zhongchengyong
29a39d9472 arch-riscv: RISCV call/ret instructions aren't decoded correctly 
This change adds IsReturn and IsCall flag for RISC-V jump instructions
by define new "JumpConstructor" in standard.isa, and fixes target
overwriting in buildRetPC.

See RAS presentation in spec:
Section 2.5 Page 22 of https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf
Or:
https://github.com/riscv/riscv-isa-manual/blob/master/src/rv32.tex#:~:text=Return%2Daddress%20prediction,%5Cend%7Btable%7D

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1139

Change-Id: I9728757c9f3f81bd498a0ba04664a003dbded3bf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58209
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-21 06:34:40 +00:00
Sungkeun Kim
af534729c4 mem-garnet: Packet Tracing of garnet network 
This is a patch to keep track of
a single packet in the garnet network.
This patch would help for finding a deadlock issue
during the extending the garnet network.

Jira Issue: https://gem5.atlassian.net/browse/GEM5-1181

Change-Id: I1138484807ef127a3240b46154e29ae77678f1e9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58857
Reviewed-by: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Maintainer: Srikant Bharadwaj <srikant.bharadwaj@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-21 01:23:24 +00:00
Iru Cai
cbd401ebc4 util: fix the cxx_config example 
This change replaces and removes the out-of-date APIs to fix the build
error, and add fixClockFrequency() call to fix the runtime error. We
also need the TRACING_ON macro and C++17 to build because of the
header changes.

Tested with X86 and tests/test-progs/hello. Checkpoint restore is not
tested yet.

Change-Id: Id92bb7954defea15b026eba3229a453b688929be
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58989
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-20 06:07:09 +00:00
Bobby R. Bruce
74f3f190fb stdlib: Add tar unpacking to downloader 
With this commit gem5-resources can exist as tarballs to be unpacked
after download. This requires the field "is_tar_archive : true" to be
present in the resource description in resources.json.

Change-Id: Ia835c1777425a5aafe8ba7ee9c725edf6d45f68c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58851
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-19 22:01:00 +00:00
Bobby R. Bruce
a64c8a9fb1 util,stdlib: Add util/md5.py 
This is a useful script for quickly checking the hash values of
resources. Since this uses the same function as the downloader, using
this utility ensures the values are identical to that found in
resources.json (i.e., what the downloader checks against to see if a
resource has changed).

Change-Id: I37f39cb8fd2c92725d956170b3656cbfb4480ce6
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58850
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-19 22:01:00 +00:00
Bobby R. Bruce
e33f9b830b stdlib: Update the stdlib resource's md5 utils 
The commit does the following:

- Moves the md5 functions to their own Python module (this will allow us
to use this elsewhere).
- Add functionality to enable md5 values for directories.
- Adds Pyunit tests for the md5 functionality.

Change-Id: I224d4584ed6c35fac3a75e221b3cb48d863ffa6f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58849
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
 2022-04-19 22:01:00 +00:00
Bobby R. Bruce
35f7008602 tests: Fix 'valid_hosts' field for KVM tests 
In some cases where we wish to use X86 KVM the 'valid_hosts' field was
set to 'constants.supported_hosts'. This can cause problems as the only
valid host for an X86 KVM test is X86. This patch fixes this.

This fix will likely fix some flakey errors observed in the Nightly
tests.

Change-Id: Id0a906ca6602c0358ae632cce314769807bf6e07
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58970
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-19 19:08:30 +00:00
Gabe Black
6d8a5ad2ad stdlib: Add missing ()s in get_supported_isas. 
A function was used directly instead of being called when interating
through ISA names.

Change-Id: I9dc53259a766a68070e0b79bb55f721a93fcdeed
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58929
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-17 01:07:55 +00:00
Hoa Nguyen
17d945b698 configs: Fix the command in the comment of arm-hello.py 
Change-Id: I5e020e066c0f6792077fbf2ef65b7f90bb9c37f9
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58830
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-16 18:22:01 +00:00
GWDx
1680d7dab4 configs: Fix spelling mistakes. 
Replace "fequency" to "frequency".

Change-Id: I307c8b6d8e60cfcb213f22aca3f6abd43c6b5b1e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58229
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-16 11:58:40 +00:00
Hoa Nguyen
e32de65973 stdlib, configs: Fix riscv-ubuntu-run error 
This change,
https://gem5-review.googlesource.com/c/public/gem5/+/58790,
mistakenly constructs the root object outside of the
Simulator object, which would create another Root object.

The correct usage of a Simulator object is to pass the board to
the object without defining the root.

Change-Id: Iaa9aabe058a00abd964bf935b1b3f05456713275
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58889
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-15 04:20:01 +00:00
Jerin Joy
70fd98e807 arch-riscv: Added the Zbs bitmanip instructions 
Added the bclr, bclri, bext, bexti, binv, binvi, bset, bseti
instructions.

Changes based on spec:
https://github.com/riscv/riscv-bitmanip/releases/download/1.0.0/bitmanip-1.0.0.pdf

Change-Id: I126d659d973b250b642bd56b3b149f0ee6a3323e
Signed-off-by: Jerin Joy <joy@rivosinc.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58632
Reviewed-by: Luming Wang <wlm199558@126.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
 2022-04-13 20:09:59 +00:00
Jerin Joy
df886bc8c1 arch-riscv: Added the Zbc bitmanip instructions 
Added clmul, clmulh, clmulr instructions.

Changes based on spec:
https://github.com/riscv/riscv-bitmanip/releases/download/1.0.0/bitmanip-1.0.0.pdf

Change-Id: I98dc76ddde052f56e32eabed12af87039def665b
Signed-off-by: Jerin Joy <joy@rivosinc.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58631
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Luming Wang <wlm199558@126.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-13 20:09:59 +00:00
Jerin Joy
aee1622a6c arch-riscv: Added the Zba and Zbb bitmanip instructions 
Zba instructions added:
add.uw, sh1add, sh1add.uw, sh2add, sh2add.uw, sh3add, sh3add.uw, slli.uw

Zbb instructions added:
andn, orn, xnor, clz, clzw, ctz, ctzw, cpop, cpopw, max, maxu, min,
minu, sext.b, sext.h, zext.h, rol, rolw, ror, rori, roriw, rorw, orc.b, rev8

Changes based on spec:
https://github.com/riscv/riscv-bitmanip/releases/download/1.0.0/bitmanip-1.0.0.pdf

Change-Id: I056719f62eee89e0f085d1bf1fa182f9dfe614d8
Signed-off-by: Jerin Joy <joy@rivosinc.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58630
Reviewed-by: Luming Wang <wlm199558@126.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-13 20:09:59 +00:00
Yu-hsin Wang
72255064d6 fastmodel: Export more CortexR52 reset pin 
Change-Id: I20f34ae2061e886b35fe9439dbb8e25ce3571e4f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58811
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-13 08:44:03 +00:00
Yu-hsin Wang
9dce95844a fastmodel: Export more CortexA76 reset pin 
Change-Id: I386cf659fa77b2005f808fde51ef772ac0a57735
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58812
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-13 08:44:03 +00:00
Gabe Black
7392cd470e scons: Ensure the fast model license count is always at least 1. 
Even though the default value for the license count is 1, it seems that
if fast model is disabled, kconfig will set it to 0. When creating a
cycle using itertools over a list with zero elements, it will raise a
StopIteration.

Even though we don't actually try to build any fast model components
in that case, we do still set them up with a license slot. If the
cycle iterator is essentially broken, that will prevent that from
working and break the build.

This change forces the license count to be at least 1, even if fast
model is disabled and the license count may be set to 0 in the config.

Change-Id: Ia8df256a8f292deb6fb6fa3c5f9a7d58c2b7f782
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58490
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-13 02:16:13 +00:00
Yu-hsin Wang
7a8af170e3 scons: Fix script failed when default files not found 
Change-Id: Ic673783cb5050159a141a869ca17b1ac09a924ef
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58809
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-13 01:11:36 +00:00
Gabe Black
7cc384c308 arch: Eliminate the now unused read_code and write_code args. 
Also eliminate the buildReadCode and buildWriteCode methods.

Change-Id: I27b1b87ab51a44b5d7280e29e22f38d97d968a65
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49743
Maintainer: Gabe Black <gabe.black@gmail.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-12 23:50:52 +00:00
Gabe Black
cfe3ed47a6 arch-x86: Override make(Read|Write) instead of (read|write)_code. 
Change-Id: Iab077f58e19aa6bfeed555caa31a4c8b3d261059
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/49741
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
 2022-04-12 23:50:38 +00:00
Jason Lowe-Power
4978bf8d5a scons: Fix bug in error message 
The variable p doesn't exist in the context. Just remove the extra
print. Even without the specific variable printed the error message is
pretty helpful.

Change-Id: If681d686c228c1362b8cc46cb14a94d7302f3793
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58429
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-12 20:30:54 +00:00
Hoa Nguyen
00fd640662 stdlib, configs: Migrate riscv-ubuntu-run example to Simulator 
Change-Id: Ie08fcf46139871bc98b9bf783d0b4d9913eace3e
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58790
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-12 18:44:35 +00:00
Bobby R. Bruce
f6b1f3f850 tests: Disable failing 8-core Boot Tests for Timing/Atomic 
As noted here: https://gem5.atlassian.net/browse/GEM5-1217, the Atomic
and Timing Core systems are not working with 8 cores when run with a
classic or MI_example cache heirarchy. Until the root cause of this
issue can be determined. These tests are being disabled.

Change-Id: Ia19579029bd20c57cca8d225068d17c4b29f1773
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58770
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
 2022-04-12 18:08:10 +00:00
Bobby R. Bruce
06881ae2a5 tests: Disable failing MI_Example/Timing CPU X86 Boot Tests 
As noted in this jira issue:
https://gem5.atlassian.net/browse/GEM5-1216, these tests are failing.
We are going to disable them until we can figure out the root cause of
this problem.

Change-Id: I8511beaac0bae3c6d2a42af59035cc4620cd5bb2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58769
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
 2022-04-12 18:08:10 +00:00
Tiago Mück
eb0b4ba657 mem-ruby: CHI fix for WUs on local+upstream line 
Fix for WriteUnique operations on cache lines that are both local and
upstream

JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I99def32948d3f0ced9cfc7f7712a0f4ae9aab0cd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57299
Reviewed-by: Tiago Muck <tiago.muck@arm.com>
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-12 10:21:57 +00:00
Gabe Black
bb45503c5f misc: Add KCONFIG.md file which talks about Kconfig files. 
There are some minor aspects about how Kconfig files are used in gem5
which are a little different from how they are documented online or are
used in other projects. Document that in this file.

Change-Id: Ib981d1e265cf466d453071b33820d6baa24e17d4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58634
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-12 04:23:40 +00:00
Matthew Poremba
b64467025d arch-vega: Implement SOP2 S_MUL_HI instructions 
Two new 32-bit signed and unsigned variants of S_MUL were added in
gfx900 which operate similar to S_MUL expect they shift the product by
32 bits after multiplication. Tested with Histogram HIP-Sample and
b+tree in rodinia 3.0 HIP port.

Change-Id: I1bed32b17ccda7aa47f3b59528eb3304912d3610
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58473
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-11 17:06:43 +00:00
Samuel Stark
7e84a14a26 mem-ruby: AbstractController unaddressed profiling 
Adds support for profiling "unaddressed" transactions,
which are associated with a unique ID rather than a memory address,
to AbstractController.

JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: Ib75f3f38dc4910acc2ad4f1c7bf88c9193568203
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57297
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-11 09:57:43 +00:00
Samuel Stark
920859e191 mem-ruby: Added upstream_nodes to AbstractController 
Added support for an upstream_nodes NetAddr list in AbstractController,
which will be used in future CHI work.

JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I30a6d621d7f201d89f0b13dab8ed4dd1f1f6caa3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57296
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-11 09:57:43 +00:00
Samuel Stark
65f8bf4460 mem-ruby: Support for unaddressed mem requests in the RubyRequest 
JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I5aa44186888b95f81bec524ff57e8dbf4c9166f8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57293
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-11 07:31:34 +00:00
Samuel Stark
32ed7794d8 mem-ruby: Add TLBI callbacks to the RubyPort 
JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I984fd497b7209772106150abb853c91c3d818dfd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57295
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-11 07:31:34 +00:00
Samuel Stark
6dac25a7f4 cpu: Handle external TLBI Sync requests in O3CPU 
JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I02e55a42e0f717211b481e65d59900fc3d05f061
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57292
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-11 07:31:34 +00:00
Matthew Poremba
8fe975e57e gpu-compute: Fatal on dynamic scratch allocation in GPUFS 
This is known not working in GPUFS. As a result, the simulation will
never end. Rather than simulate forever, add a fatal for now to exit
simulation until support for this functionality is added.

Change-Id: I8e45996a7eb781575e8643baea05daf87bc5f1c3
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58472
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-08 17:12:32 +00:00
Matthew Poremba
1562251243 dev-amdgpu: Update comments pointing to ROCK repo 
It seems the tag name was changed which broke a few links in some
comments pointing to where definitions and struct come from. Update the
URLs and also use consistent version.

Change-Id: I7d6393f1f08d592989999a8a6f9c5bbdf1a9c992
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58471
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-08 17:12:32 +00:00
Matthew Poremba
e3f65393fd dev-amdgpu,arch-vega: Implement TLB invalidation logic 
Add logic to collect pointers to all GPU TLBs in full system. Implement
the invalid TLBs PM4 packet. The invalidate is done functionally since
there is really no benefit to simulate it with timing and there is no
support in the TLB to do so. This allow application with much larger
data sets which may reuse device memory pages to work in gem5 without
possibly crashing due to a stale translation being leftover in the TLB.

Change-Id: Ia30cce02154d482d8f75b2280409abb8f8375c24
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58470
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-08 17:12:32 +00:00
Cui Jin
19bf5c4f33 cpu-o3: Resolve circular buffer issue for LSQ 
--since int is only 4 bytes, while ssize_t is 8 bytes in 64bit
  system. so 0x80000000 is regarded as negative value.

Jira Issue:: https://gem5.atlassian.net/browse/GEM5-1203

Change-Id: I74b3785b29751f777f5e154692fa60bf62b37b9f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58649
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-08 15:40:30 +00:00
Bobby R. Bruce
c296940103 stdlib: Fixing resources.json caching for multi-user envs 
The downloader briefly caches the resources.json file in "/tmp". This
works fine if the system only has one user, but in a system supporting
many users, where "/tmp" is shared, there were permission issues when a
user tried to access a resources.json cache from another user. To
resolve this the uid of the user is appended to the filename.

Change-Id: Iba8ab12cd7054c2f5636e444ac0f1f8f73fedc89
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58489
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-08 04:05:23 +00:00
Gabe Black
8a91e933e8 scons: Use the 'png' tag for the PNG library. 
Use that instead of checking HAVE_PNG manually.

Change-Id: I70876982c2506bee1173341fa100f5fae2ae4302
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58709
Maintainer: Gabe Black <gabe.black@gmail.com>
Reviewed-by: Yu-hsin Wang <yuhsingw@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:47:23 +00:00
Matthew Poremba
c353b0522a configs: Add option for mem type for GPUFS 
The user will likely want to be able to specify a different type of
memory for the GPU rather than using the same default for the CPU. Add
the option to do that.

Change-Id: I62c22f6283335c3ca3df355f8ecc4bbffa751a73
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58390
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Matthew Poremba
4387321bed configs: Exit GPUFS script if DKMS module does not exist 
The supported version of ROCm in GPUFS only supports the DKMS build of
the amdgpu driver. However, since a gem5 user can potentially pass in
any Linux kernel as a parameter, it is possible that the DKMS package
for that kernel was not installed on the disk image. This would result
in the simulation appearing to work when in reality it is just spinning
waiting for commands from the driver. This check exits gem5 early in the
simulation and outputs an error on the console to sanity check the
correct driver is being used.

Change-Id: I708912e5625e47eba15dcb2f722772a3b2928b98
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58129
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Matthew Poremba
e36a8dbd8a gpu-compute: Handle GPUFS system store responses 
Requests in GPUFS which go to system memory will not generate the
WriteCompleteResp packets that the VIPER protocol would normally created
for device requests which go through the caches. Therefore, we need to
callback the GM pipe handleResponse to complete the access and make
forward progress.

Change-Id: Ic00c430ce420a591fe5743f758b780d93afd2a38
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57989
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Matthew Poremba
6feaa88e27 gpu-compute: Command processor read path from device 
In full system mode, the AMDKernelCode object can reside in either the
system memory or in the dGPU device memory. Currently only reading from
the host/system memory is supported. This adds the necessary code to
read from the dGPU device memory.

Change-Id: I887fc706b3f9834db14e40f36fd29dd3d4602925
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57710
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Matthew Poremba
fcbc9afcd6 gpu-compute: Don't use emulated driver in full system 
The emulated driver is currently called in a few locations
unconditionally. This changeset adds checks that we are not in full
system before calling any emulated driver function. In full system the
amdgpu driver running on the disk image handles these functions.

Change-Id: Iea3546b574e29c649351c0fce9154530be89e9b1
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57712
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Matthew Poremba
f375e79bcf gpu-compute: Support Scalar and Vector access to system pages 
The amdgpu driver supports reading and writing scalar and vector memory
addresses that reside in system memory. This is commonly used for things
like blit kernels that perform host-to-device or device-to-host copies
using GPU load/store instructions.

This is done by utilizing the system hub device added in a prior
changeset. Memory packets translated by the Scalar or VMEM TLBs will
have the correspoding system request field set from the PTE in the TLB
which can be used in the compute unit to determine if a request is for
system memory or not.

Another important change is to return global memory tokens for system
requests. Since these do not flow through the GPU coalescer where the
token is returned, the token can be returned once the request is known
to be a system request.

Change-Id: I35030e0b3698f10c63a397f96b81267271e3130e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57711
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Matthew Poremba
347364ab0f gpu-compute: Handle mailbox/wakeup signals for GPUFS 
The current mailbox/wakeup signal uses the SE mode proxy port to write
the event value. This is not available in full system mode so instead we
need to issue a DMA write to the address. The value of event_val clears
the event.

Change-Id: I424469076e87e690ab0bb722bac4c3e7414fb150
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57709
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Maintainer: Matt Sinclair <mattdsinclair@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 20:11:01 +00:00
Chia-You Chen
fb173e4d2c fastmodel: use global option 'num_jobs' instead of hardcoded number 
Change-Id: I2d3f0855c8475cd44b1012fddf6b695621b2347f
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58689
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Gabe Black <gabe.black@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-07 08:09:42 +00:00
Samuel Stark
eafc6ea626 cpu: Handle external TLBI Sync requests in TimingCPU 
JIRA: https://gem5.atlassian.net/browse/GEM5-1097

Change-Id: I4e92f7886a296f119720b8bcda6bea722df76153
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57291
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-06 16:17:57 +00:00
Giacomo Travaglini
38fe886ee3 mem-ruby: Support for mem commands in the Sequencer 
The isPhysMemAddress checks if a valid memory address
refers to physical memory. This can't be used for memory
commands a they don't hold a valid address/size

Change-Id: Ib39c759aa90ab50ffe2036b5f0ae17627f57e5f5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58510
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
 2022-04-06 08:37:11 +00:00