stdlib, configs: Migrate riscv-ubuntu-run example to Simulator

Change-Id: Ie08fcf46139871bc98b9bf783d0b4d9913eace3e
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/58790
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Reviewed-by: Bobby Bruce <bbruce@ucdavis.edu>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Bobby Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
This commit is contained in:
Hoa Nguyen
2022-04-11 15:51:59 -07:00
parent f6b1f3f850
commit 00fd640662

View File

@@ -53,6 +53,7 @@ from gem5.components.processors.cpu_types import CPUTypes
from gem5.isas import ISA
from gem5.coherence_protocol import CoherenceProtocol
from gem5.resources.resource import Resource
from gem5.simulate.simulator import Simulator
# This runs a check to ensure the gem5 binary is compiled for RISCV.
@@ -116,32 +117,5 @@ board.set_kernel_disk_workload(
root = Root(full_system=True, system=board)
m5.instantiate()
# We simulate the system till we encounter `m5_exit instruction encountered`.
exit_event = m5.simulate()
# We check whether the simulation ended with `m5_exit instruction encountered`
if exit_event.getCause() == "m5_exit instruction encountered":
# We acknowledge the user that the boot was successful.
print("Successfully completed booting!")
else:
# `m5_exit instruction encountered` was never encountered. We exit the
# program unsuccessfully.
print("The startup was not completed successfully!",)
print(
"Exiting @ tick {} because {}."\
.format(m5.curTick(), exit_event.getCause())
)
exit(-1)
# We are done with the simulation. We exit the program now.
print(
"Exiting @ tick {} because {}."\
.format(m5.curTick(), exit_event.getCause())
)
simulator = Simulator(board=board)
simulator.run()